3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 * John Otken, jotken@softadvances.com
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /************************************************************************
26 * luan.h - configuration for LUAN board
27 ***********************************************************************/
31 /*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34 #define CONFIG_LUAN 1 /* Board is Luan */
35 #define CONFIG_440SP 1 /* Specific PPC440SP support */
36 #define CONFIG_4xx 1 /* PPC4xx family */
38 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
40 #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
41 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
42 #define CONFIG_ADD_RAM_INFO 1 /* Print additional info */
44 /*-----------------------------------------------------------------------
45 * Base addresses -- Note these are effective addresses where the
46 * actual resources get mapped (not physical addresses)
47 *----------------------------------------------------------------------*/
48 #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
49 #define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc */
50 #define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
51 #define CFG_SDRAM_BASE 0x00000000 /* MUST be zero */
53 #define CFG_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */
54 #define CFG_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */
55 #define CFG_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */
56 #define CFG_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */
58 #define CFG_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */
60 #define CFG_PERIPHERAL_BASE 0xf0000000 /* internal peripherals */
62 #define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
63 #define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
64 #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
66 #if CFG_LARGE_FLASH == 0xffc00000
67 #define CFG_FLASH_BASE CFG_LARGE_FLASH
69 #define CFG_FLASH_BASE CFG_SMALL_FLASH
74 #define CFG_KBYTES_SDRAM 1024*2
76 #define CFG_KBYTES_SDRAM 1024
79 /*-----------------------------------------------------------------------
80 * Initial RAM & stack pointer (placed in SDRAM)
81 *----------------------------------------------------------------------*/
82 #define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE
83 #define CFG_INIT_RAM_END (8 << 10)
84 #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
85 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
86 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
88 /*-----------------------------------------------------------------------
90 *----------------------------------------------------------------------*/
91 #define CFG_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */
92 #define CONFIG_BAUDRATE 115200
93 #undef CONFIG_SERIAL_MULTI
94 #undef CONFIG_UART1_CONSOLE /* define if you want console on UART1 */
96 #define CFG_BAUDRATE_TABLE \
97 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
99 /*-----------------------------------------------------------------------
101 *----------------------------------------------------------------------*/
103 * Define here the location of the environment variables (FLASH or EEPROM).
104 * Note: DENX encourages to use redundant environment in FLASH.
106 #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
108 /*-----------------------------------------------------------------------
110 *----------------------------------------------------------------------*/
111 #define CFG_MAX_FLASH_BANKS 3 /* max number of memory banks */
112 #define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
114 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
115 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
117 #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
119 #define CFG_FLASH_ADDR0 0x555
120 #define CFG_FLASH_ADDR1 0x2aa
121 #define CFG_FLASH_WORD_SIZE unsigned char
123 #ifdef CFG_ENV_IS_IN_FLASH
124 #define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
125 #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
126 #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
128 /* Address and size of Redundant Environment Sector */
129 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
130 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
131 #endif /* CFG_ENV_IS_IN_FLASH */
133 /*-----------------------------------------------------------------------
135 *----------------------------------------------------------------------*/
136 #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
137 #define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
138 #define CONFIG_DDR_ECC 1 /* with ECC support */
139 #define CFG_44x_DDR2_CKTR_180 1 /* use 180 deg advance */
141 /*-----------------------------------------------------------------------
143 *----------------------------------------------------------------------*/
144 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
145 #undef CONFIG_SOFT_I2C /* I2C bit-banged */
146 #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
147 #define CFG_I2C_SLAVE 0x7F
149 #define CFG_I2C_MULTI_EEPROMS
150 #define CFG_I2C_EEPROM_ADDR (0xa8>>1)
151 #define CFG_I2C_EEPROM_ADDR_LEN 1
152 #define CFG_EEPROM_PAGE_WRITE_ENABLE
153 #define CFG_EEPROM_PAGE_WRITE_BITS 3
154 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
156 #define CONFIG_PREBOOT "echo;" \
157 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
160 #undef CONFIG_BOOTARGS
162 #define CONFIG_EXTRA_ENV_SETTINGS \
165 "nfsargs=setenv bootargs root=/dev/nfs rw " \
166 "nfsroot=$(serverip):$(rootpath)\0" \
167 "ramargs=setenv bootargs root=/dev/ram rw\0" \
168 "addip=setenv bootargs $(bootargs) " \
169 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
170 ":$(hostname):$(netdev):off panic=1\0" \
171 "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
172 "flash_nfs=run nfsargs addip addtty;" \
173 "bootm $(kernel_addr)\0" \
174 "flash_self=run ramargs addip addtty;" \
175 "bootm $(kernel_addr) $(ramdisk_addr)\0" \
176 "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;" \
178 "rootpath=/opt/eldk/ppc_4xx\0" \
179 "bootfile=/tftpboot/luan/uImage\0" \
180 "kernel_addr=fc000000\0" \
181 "ramdisk_addr=fc100000\0" \
182 "initrd_high=30000000\0" \
183 "load=tftp 100000 /tftpboot/luan/u-boot.bin\0" \
184 "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
185 "cp.b 100000 fffc0000 40000;" \
186 "setenv filesize;saveenv\0" \
187 "upd=run load;run update\0" \
189 #define CONFIG_BOOTCOMMAND "run flash_self"
192 #define CONFIG_BOOTDELAY -1 /* autoboot disabled */
194 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
197 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
198 #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
200 #define CONFIG_MII 1 /* MII PHY management */
201 #define CONFIG_PHY_ADDR 1
202 #define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
203 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
205 #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
207 #define CONFIG_NETCONSOLE /* include NetConsole support */
208 #define CONFIG_NET_MULTI /* needed for NetConsole */
211 #define CONFIG_PANIC_HANG
213 #define CONFIG_HW_WATCHDOG /* watchdog */
220 #define CONFIG_BOOTP_BOOTFILESIZE
221 #define CONFIG_BOOTP_BOOTPATH
222 #define CONFIG_BOOTP_GATEWAY
223 #define CONFIG_BOOTP_HOSTNAME
227 * Command line configuration.
229 #include <config_cmd_default.h>
231 #define CONFIG_CMD_ASKENV
232 #define CONFIG_CMD_DHCP
233 #define CONFIG_CMD_ELF
234 #define CONFIG_CMD_EEPROM
235 #define CONFIG_CMD_I2C
236 #define CONFIG_CMD_IRQ
237 #define CONFIG_CMD_MII
238 #define CONFIG_CMD_NET
239 #define CONFIG_CMD_NFS
240 #define CONFIG_CMD_PCI
241 #define CONFIG_CMD_PING
242 #define CONFIG_CMD_REGINFO
243 #define CONFIG_CMD_SDRAM
247 * Miscellaneous configurable options
249 #define CFG_LONGHELP /* undef to save memory */
250 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
251 #if defined(CONFIG_CMD_KGDB)
252 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
254 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
256 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
257 #define CFG_MAXARGS 16 /* max number of command args */
258 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
260 #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
261 #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
263 #define CFG_LOAD_ADDR 0x100000 /* default load address */
264 #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
265 #undef CONFIG_LYNXKDI /* support kdi files */
267 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
269 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
270 #define CONFIG_LOOPW 1 /* enable loopw command */
271 #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
272 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
273 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
275 /*-----------------------------------------------------------------------
277 *-----------------------------------------------------------------------
279 #if defined(CONFIG_CMD_PCI)
282 #define CONFIG_PCI /* include pci support */
283 #define CONFIG_PCI_PNP /* do (not) pci plug-and-play */
284 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
286 /* Board-specific PCI */
287 #define CFG_PCI_TARGET_INIT
288 #undef CFG_PCI_MASTER_INIT
290 #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
291 #define CFG_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */
296 * For booting Linux, the board info and command line data
297 * have to be in the first 8 MB of memory, since this is
298 * the maximum mapped by the Linux kernel during initialization.
300 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
302 /*-----------------------------------------------------------------------
303 * Cache Configuration
305 #define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
306 #define CFG_CACHELINE_SIZE 32 /* ... */
307 #if defined(CONFIG_CMD_KGDB)
308 #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
312 * Internal Definitions
316 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
317 #define BOOTFLAG_WARM 0x02 /* Software reboot */
319 #if defined(CONFIG_CMD_KGDB)
320 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
321 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
324 #endif /* __CONFIG_H */