3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 * John Otken, jotken@softadvances.com
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /************************************************************************
26 * luan.h - configuration for LUAN board
27 ***********************************************************************/
31 /*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34 #define CONFIG_LUAN 1 /* Board is Luan */
35 #define CONFIG_440SP 1 /* Specific PPC440SP support */
36 #define CONFIG_4xx 1 /* PPC4xx family */
38 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
41 * Include common defines/options for all AMCC eval boards
43 #define CONFIG_HOSTNAME luan
44 #include "amcc-common.h"
46 #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
47 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
49 /*-----------------------------------------------------------------------
50 * Base addresses -- Note these are effective addresses where the
51 * actual resources get mapped (not physical addresses)
52 *----------------------------------------------------------------------*/
53 #define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */
54 #define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */
55 #define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */
56 #define CONFIG_SYS_SRAM_SIZE (1 << 20)
57 #define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */
59 #define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */
61 #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
62 #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
63 #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
65 #if CONFIG_SYS_LARGE_FLASH == 0xffc00000
66 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LARGE_FLASH
68 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SMALL_FLASH
71 #if CONFIG_SYS_SRAM_BASE
72 #define CONFIG_SYS_KBYTES_SDRAM 1024*2
74 #define CONFIG_SYS_KBYTES_SDRAM 1024
77 /*-----------------------------------------------------------------------
78 * Initial RAM & stack pointer (placed in SDRAM)
79 *----------------------------------------------------------------------*/
80 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE
81 #define CONFIG_SYS_INIT_RAM_END (8 << 10)
82 #define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
83 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
84 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
86 /*-----------------------------------------------------------------------
88 *----------------------------------------------------------------------*/
89 #define CONFIG_CONS_INDEX 1 /* Use UART0 */
90 #define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */
92 /*-----------------------------------------------------------------------
94 *----------------------------------------------------------------------*/
96 * Define here the location of the environment variables (FLASH or EEPROM).
97 * Note: DENX encourages to use redundant environment in FLASH.
99 #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
101 /*-----------------------------------------------------------------------
103 *----------------------------------------------------------------------*/
104 #define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */
105 #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
107 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
108 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
110 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
112 #define CONFIG_SYS_FLASH_ADDR0 0x555
113 #define CONFIG_SYS_FLASH_ADDR1 0x2aa
114 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char
116 #ifdef CONFIG_ENV_IS_IN_FLASH
117 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
118 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
119 #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
121 /* Address and size of Redundant Environment Sector */
122 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
123 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
124 #endif /* CONFIG_ENV_IS_IN_FLASH */
126 /*-----------------------------------------------------------------------
128 *----------------------------------------------------------------------*/
129 #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
130 #define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
131 #define CONFIG_DDR_ECC 1 /* with ECC support */
133 /*-----------------------------------------------------------------------
135 *----------------------------------------------------------------------*/
136 #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
138 #define CONFIG_SYS_I2C_MULTI_EEPROMS
139 #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
140 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
141 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
142 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
145 * Default environment variables
147 #define CONFIG_EXTRA_ENV_SETTINGS \
148 CONFIG_AMCC_DEF_ENV \
149 CONFIG_AMCC_DEF_ENV_PPC \
150 CONFIG_AMCC_DEF_ENV_NOR_UPD \
151 "kernel_addr=fc000000\0" \
152 "ramdisk_addr=fc100000\0" \
155 #define CONFIG_HAS_ETH0
156 #define CONFIG_PHY_ADDR 1
157 #define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
158 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
161 #define CONFIG_PANIC_HANG
163 #define CONFIG_HW_WATCHDOG /* watchdog */
167 * Commands additional to the ones defined in amcc-common.h
169 #define CONFIG_CMD_PCI
170 #define CONFIG_CMD_SDRAM
172 /*-----------------------------------------------------------------------
174 *-----------------------------------------------------------------------
176 #if defined(CONFIG_CMD_PCI)
179 #define CONFIG_PCI /* include pci support */
180 #define CONFIG_PCI_PNP /* do (not) pci plug-and-play */
181 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
183 /* Board-specific PCI */
184 #define CONFIG_SYS_PCI_TARGET_INIT
185 #undef CONFIG_SYS_PCI_MASTER_INIT
187 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
188 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */
192 #endif /* __CONFIG_H */