serial: Use the default CONFIG_SYS_BAUDRATE_TABLE in more platforms
[platform/kernel/u-boot.git] / include / configs / ls1046a_common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2016 Freescale Semiconductor
4  * Copyright 2019-2021 NXP
5  */
6
7 #ifndef __LS1046A_COMMON_H
8 #define __LS1046A_COMMON_H
9
10 /* SPL build */
11 #ifdef CONFIG_SPL_BUILD
12 #define SPL_NO_QBMAN
13 #define SPL_NO_FMAN
14 #define SPL_NO_ENV
15 #define SPL_NO_MISC
16 #define SPL_NO_QSPI
17 #define SPL_NO_USB
18 #define SPL_NO_SATA
19 #endif
20 #if defined(CONFIG_SPL_BUILD) && \
21         (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
22 #define SPL_NO_MMC
23 #endif
24 #if defined(CONFIG_SPL_BUILD)           && \
25         !defined(CONFIG_SPL_FSL_LS_PPA)
26 #define SPL_NO_IFC
27 #endif
28
29 #define CONFIG_REMAKE_ELF
30
31 #include <asm/arch/config.h>
32 #include <asm/arch/stream_id_lsch2.h>
33
34 /* Link Definitions */
35 #ifdef CONFIG_TFABOOT
36 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
37 #else
38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
39 #endif
40
41 #define CONFIG_VERY_BIG_RAM
42 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
43 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
44 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
45 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
46
47 #define CPU_RELEASE_ADDR               secondary_boot_addr
48
49 /* Generic Timer Definitions */
50 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
51
52 /* Serial Port */
53 #define CONFIG_SYS_NS16550_SERIAL
54 #define CONFIG_SYS_NS16550_REG_SIZE     1
55 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
56
57 /* SD boot SPL */
58 #ifdef CONFIG_SD_BOOT
59 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
60 #define CONFIG_SPL_STACK                0x10020000
61 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
62 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
63 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
64 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
65                                         CONFIG_SPL_BSS_MAX_SIZE)
66 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
67
68 #ifdef CONFIG_NXP_ESBC
69 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
70 /*
71  * HDR would be appended at end of image and copied to DDR along
72  * with U-Boot image. Here u-boot max. size is 512K. So if binary
73  * size increases then increase this size in case of secure boot as
74  * it uses raw u-boot image instead of fit image.
75  */
76 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
77 #else
78 #define CONFIG_SYS_MONITOR_LEN          0x100000
79 #endif /* ifdef CONFIG_NXP_ESBC */
80 #endif
81
82 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
83 #define CONFIG_SPL_TARGET               "spl/u-boot-spl.pbl"
84 #define CONFIG_SPL_MAX_SIZE             0x1f000
85 #define CONFIG_SPL_STACK                0x10020000
86 #define CONFIG_SPL_PAD_TO               0x20000
87 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
88 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
89 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
90                                         CONFIG_SPL_BSS_MAX_SIZE)
91 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
92 #define CONFIG_SYS_MONITOR_LEN          0x100000
93 #endif
94
95 /* NAND SPL */
96 #ifdef CONFIG_NAND_BOOT
97 #define CONFIG_SPL_PBL_PAD
98 #define CONFIG_SPL_LIBCOMMON_SUPPORT
99 #define CONFIG_SPL_LIBGENERIC_SUPPORT
100 #define CONFIG_SPL_ENV_SUPPORT
101 #define CONFIG_SPL_WATCHDOG
102 #define CONFIG_SPL_I2C
103
104 #define CONFIG_SPL_NAND_SUPPORT
105 #define CONFIG_SPL_DRIVERS_MISC
106 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
107 #define CONFIG_SPL_STACK                0x1001f000
108 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
109 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
110
111 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
112 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
113 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
114                                         CONFIG_SPL_BSS_MAX_SIZE)
115 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
116 #define CONFIG_SYS_MONITOR_LEN          0xa0000
117 #endif
118
119 /* GPIO */
120 #ifdef CONFIG_DM_GPIO
121 #ifndef CONFIG_MPC8XXX_GPIO
122 #define CONFIG_MPC8XXX_GPIO
123 #endif
124 #endif
125
126 /* I2C */
127
128 /* PCIe */
129 #define CONFIG_PCIE1            /* PCIE controller 1 */
130 #define CONFIG_PCIE2            /* PCIE controller 2 */
131 #define CONFIG_PCIE3            /* PCIE controller 3 */
132
133 #ifdef CONFIG_PCI
134 #define CONFIG_PCI_SCAN_SHOW
135 #endif
136
137 /* SATA */
138 #ifndef SPL_NO_SATA
139 #define CONFIG_SCSI_AHCI_PLAT
140
141 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
142
143 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
144 #define CONFIG_SYS_SCSI_MAX_LUN                 1
145 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
146                                                 CONFIG_SYS_SCSI_MAX_LUN)
147 #endif
148
149 /* FMan ucode */
150 #ifndef SPL_NO_FMAN
151 #define CONFIG_SYS_DPAA_FMAN
152 #ifdef CONFIG_SYS_DPAA_FMAN
153 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
154 #endif
155
156 #ifdef CONFIG_TFABOOT
157 #define CONFIG_SYS_FMAN_FW_ADDR         0x900000
158 #else
159 #ifdef CONFIG_SD_BOOT
160 /*
161  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
162  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
163  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
164  */
165 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
166 #elif defined(CONFIG_QSPI_BOOT)
167 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
168 #elif defined(CONFIG_NAND_BOOT)
169 #define CONFIG_SYS_FMAN_FW_ADDR         (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
170 #else
171 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
172 #endif
173 #endif
174 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
175 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
176 #endif
177
178 /* Miscellaneous configurable options */
179
180 #define CONFIG_HWCONFIG
181 #define HWCONFIG_BUFFER_SIZE            128
182
183 #ifndef CONFIG_SPL_BUILD
184 #define BOOT_TARGET_DEVICES(func) \
185         func(SCSI, scsi, 0) \
186         func(MMC, mmc, 0) \
187         func(USB, usb, 0) \
188         func(DHCP, dhcp, na)
189 #include <config_distro_bootcmd.h>
190 #endif
191
192 #if defined(CONFIG_TARGET_LS1046AFRWY)
193 #define LS1046A_BOOT_SRC_AND_HDR\
194         "boot_scripts=ls1046afrwy_boot.scr\0"   \
195         "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
196 #elif defined(CONFIG_TARGET_LS1046AQDS)
197 #define LS1046A_BOOT_SRC_AND_HDR\
198         "boot_scripts=ls1046aqds_boot.scr\0"    \
199         "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
200 #else
201 #define LS1046A_BOOT_SRC_AND_HDR\
202         "boot_scripts=ls1046ardb_boot.scr\0"    \
203         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
204 #endif
205 #ifndef SPL_NO_MISC
206 /* Initial environment variables */
207 #define CONFIG_EXTRA_ENV_SETTINGS               \
208         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
209         "ramdisk_addr=0x800000\0"               \
210         "ramdisk_size=0x2000000\0"              \
211         "bootm_size=0x10000000\0"               \
212         "fdt_addr=0x64f00000\0"                 \
213         "kernel_addr=0x61000000\0"              \
214         "scriptaddr=0x80000000\0"               \
215         "scripthdraddr=0x80080000\0"            \
216         "fdtheader_addr_r=0x80100000\0"         \
217         "kernelheader_addr_r=0x80200000\0"      \
218         "load_addr=0xa0000000\0"            \
219         "kernel_addr_r=0x81000000\0"            \
220         "fdt_addr_r=0x90000000\0"               \
221         "ramdisk_addr_r=0xa0000000\0"           \
222         "kernel_start=0x1000000\0"              \
223         "kernelheader_start=0x600000\0"         \
224         "kernel_load=0xa0000000\0"              \
225         "kernel_size=0x2800000\0"               \
226         "kernelheader_size=0x40000\0"           \
227         "kernel_addr_sd=0x8000\0"               \
228         "kernel_size_sd=0x14000\0"              \
229         "kernelhdr_addr_sd=0x3000\0"            \
230         "kernelhdr_size_sd=0x10\0"              \
231         "console=ttyS0,115200\0"                \
232          CONFIG_MTDPARTS_DEFAULT "\0"           \
233         BOOTENV                                 \
234         LS1046A_BOOT_SRC_AND_HDR                \
235         "scan_dev_for_boot_part="               \
236                 "part list ${devtype} ${devnum} devplist; "   \
237                 "env exists devplist || setenv devplist 1; "  \
238                 "for distro_bootpart in ${devplist}; do "     \
239                   "if fstype ${devtype} "                  \
240                         "${devnum}:${distro_bootpart} "      \
241                         "bootfstype; then "                  \
242                         "run scan_dev_for_boot; "            \
243                   "fi; "                                   \
244                 "done\0"                                   \
245         "boot_a_script="                                  \
246                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
247                         "${scriptaddr} ${prefix}${script}; "    \
248                 "env exists secureboot && load ${devtype} "     \
249                         "${devnum}:${distro_bootpart} "         \
250                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
251                         "env exists secureboot "        \
252                         "&& esbc_validate ${scripthdraddr};"    \
253                 "source ${scriptaddr}\0"          \
254         "qspi_bootcmd=echo Trying load from qspi..;"      \
255                 "sf probe && sf read $load_addr "         \
256                 "$kernel_start $kernel_size; env exists secureboot "    \
257                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
258                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
259                 "bootm $load_addr#$board\0"             \
260         "nand_bootcmd=echo Trying load from nand..;"      \
261                 "nand info; nand read $load_addr "         \
262                 "$kernel_start $kernel_size; env exists secureboot "    \
263                 "&& nand read $kernelheader_addr_r $kernelheader_start " \
264                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
265                 "bootm $load_addr#$board\0"             \
266         "nor_bootcmd=echo Trying load from nor..;"      \
267                 "cp.b $kernel_addr $load_addr "         \
268                 "$kernel_size; env exists secureboot "  \
269                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
270                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
271                 "bootm $load_addr#$board\0"     \
272         "sd_bootcmd=echo Trying load from SD ..;"       \
273                 "mmcinfo; mmc read $load_addr "         \
274                 "$kernel_addr_sd $kernel_size_sd && "   \
275                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
276                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
277                 " && esbc_validate ${kernelheader_addr_r};"     \
278                 "bootm $load_addr#$board\0"
279
280 #endif
281
282 /* Monitor Command Prompt */
283 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
284
285 #define CONFIG_SYS_MAXARGS              64      /* max command args */
286
287 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
288
289 #include <asm/arch/soc.h>
290
291 #endif /* __LS1046A_COMMON_H */