Convert CONFIG_SYS_MAXARGS to Kconfig
[platform/kernel/u-boot.git] / include / configs / ls1046a_common.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2016 Freescale Semiconductor
4  * Copyright 2019-2021 NXP
5  */
6
7 #ifndef __LS1046A_COMMON_H
8 #define __LS1046A_COMMON_H
9
10 /* SPL build */
11 #ifdef CONFIG_SPL_BUILD
12 #define SPL_NO_QBMAN
13 #define SPL_NO_FMAN
14 #define SPL_NO_ENV
15 #define SPL_NO_MISC
16 #define SPL_NO_QSPI
17 #define SPL_NO_USB
18 #define SPL_NO_SATA
19 #endif
20 #if defined(CONFIG_SPL_BUILD) && \
21         (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
22 #define SPL_NO_MMC
23 #endif
24 #if defined(CONFIG_SPL_BUILD)           && \
25         !defined(CONFIG_SPL_FSL_LS_PPA)
26 #define SPL_NO_IFC
27 #endif
28
29 #include <asm/arch/config.h>
30 #include <asm/arch/stream_id_lsch2.h>
31
32 /* Link Definitions */
33 #ifdef CONFIG_TFABOOT
34 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
35 #else
36 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
37 #endif
38
39 #define CONFIG_VERY_BIG_RAM
40 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
41 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
42 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
43 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
44
45 #define CPU_RELEASE_ADDR               secondary_boot_addr
46
47 /* Serial Port */
48 #define CONFIG_SYS_NS16550_SERIAL
49 #define CONFIG_SYS_NS16550_REG_SIZE     1
50 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
51
52 /* SD boot SPL */
53 #ifdef CONFIG_SD_BOOT
54 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
55 #define CONFIG_SPL_STACK                0x10020000
56 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
57 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
58 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
59 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
60                                         CONFIG_SPL_BSS_MAX_SIZE)
61 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
62
63 #ifdef CONFIG_NXP_ESBC
64 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
65 /*
66  * HDR would be appended at end of image and copied to DDR along
67  * with U-Boot image. Here u-boot max. size is 512K. So if binary
68  * size increases then increase this size in case of secure boot as
69  * it uses raw u-boot image instead of fit image.
70  */
71 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
72 #else
73 #define CONFIG_SYS_MONITOR_LEN          0x100000
74 #endif /* ifdef CONFIG_NXP_ESBC */
75 #endif
76
77 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
78 #define CONFIG_SPL_TARGET               "spl/u-boot-spl.pbl"
79 #define CONFIG_SPL_MAX_SIZE             0x1f000
80 #define CONFIG_SPL_STACK                0x10020000
81 #define CONFIG_SPL_PAD_TO               0x20000
82 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
83 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
84 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
85                                         CONFIG_SPL_BSS_MAX_SIZE)
86 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
87 #define CONFIG_SYS_MONITOR_LEN          0x100000
88 #endif
89
90 /* NAND SPL */
91 #ifdef CONFIG_NAND_BOOT
92 #define CONFIG_SPL_PBL_PAD
93
94 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
95 #define CONFIG_SPL_STACK                0x1001f000
96 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
97 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
98
99 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
100 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
101 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
102                                         CONFIG_SPL_BSS_MAX_SIZE)
103 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
104 #define CONFIG_SYS_MONITOR_LEN          0xa0000
105 #endif
106
107 /* GPIO */
108
109 /* I2C */
110
111 /* PCIe */
112 #define CONFIG_PCIE1            /* PCIE controller 1 */
113 #define CONFIG_PCIE2            /* PCIE controller 2 */
114 #define CONFIG_PCIE3            /* PCIE controller 3 */
115
116 #ifdef CONFIG_PCI
117 #define CONFIG_PCI_SCAN_SHOW
118 #endif
119
120 /* SATA */
121 #ifndef SPL_NO_SATA
122 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
123 #endif
124
125 /* FMan ucode */
126 #ifndef SPL_NO_FMAN
127 #define CONFIG_SYS_DPAA_FMAN
128 #ifdef CONFIG_SYS_DPAA_FMAN
129 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
130 #endif
131 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
132 #endif
133
134 /* Miscellaneous configurable options */
135
136 #define CONFIG_HWCONFIG
137 #define HWCONFIG_BUFFER_SIZE            128
138
139 #ifndef CONFIG_SPL_BUILD
140 #define BOOT_TARGET_DEVICES(func) \
141         func(SCSI, scsi, 0) \
142         func(MMC, mmc, 0) \
143         func(USB, usb, 0) \
144         func(DHCP, dhcp, na)
145 #include <config_distro_bootcmd.h>
146 #endif
147
148 #if defined(CONFIG_TARGET_LS1046AFRWY)
149 #define LS1046A_BOOT_SRC_AND_HDR\
150         "boot_scripts=ls1046afrwy_boot.scr\0"   \
151         "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
152 #elif defined(CONFIG_TARGET_LS1046AQDS)
153 #define LS1046A_BOOT_SRC_AND_HDR\
154         "boot_scripts=ls1046aqds_boot.scr\0"    \
155         "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
156 #else
157 #define LS1046A_BOOT_SRC_AND_HDR\
158         "boot_scripts=ls1046ardb_boot.scr\0"    \
159         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
160 #endif
161 #ifndef SPL_NO_MISC
162 /* Initial environment variables */
163 #define CONFIG_EXTRA_ENV_SETTINGS               \
164         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
165         "ramdisk_addr=0x800000\0"               \
166         "ramdisk_size=0x2000000\0"              \
167         "bootm_size=0x10000000\0"               \
168         "kernel_addr=0x61000000\0"              \
169         "scriptaddr=0x80000000\0"               \
170         "scripthdraddr=0x80080000\0"            \
171         "fdtheader_addr_r=0x80100000\0"         \
172         "kernelheader_addr_r=0x80200000\0"      \
173         "load_addr=0xa0000000\0"            \
174         "kernel_addr_r=0x81000000\0"            \
175         "fdt_addr_r=0x90000000\0"               \
176         "ramdisk_addr_r=0xa0000000\0"           \
177         "kernel_start=0x1000000\0"              \
178         "kernelheader_start=0x600000\0"         \
179         "kernel_load=0xa0000000\0"              \
180         "kernel_size=0x2800000\0"               \
181         "kernelheader_size=0x40000\0"           \
182         "kernel_addr_sd=0x8000\0"               \
183         "kernel_size_sd=0x14000\0"              \
184         "kernelhdr_addr_sd=0x3000\0"            \
185         "kernelhdr_size_sd=0x10\0"              \
186         "console=ttyS0,115200\0"                \
187          CONFIG_MTDPARTS_DEFAULT "\0"           \
188         BOOTENV                                 \
189         LS1046A_BOOT_SRC_AND_HDR                \
190         "scan_dev_for_boot_part="               \
191                 "part list ${devtype} ${devnum} devplist; "   \
192                 "env exists devplist || setenv devplist 1; "  \
193                 "for distro_bootpart in ${devplist}; do "     \
194                   "if fstype ${devtype} "                  \
195                         "${devnum}:${distro_bootpart} "      \
196                         "bootfstype; then "                  \
197                         "run scan_dev_for_boot; "            \
198                   "fi; "                                   \
199                 "done\0"                                   \
200         "boot_a_script="                                  \
201                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
202                         "${scriptaddr} ${prefix}${script}; "    \
203                 "env exists secureboot && load ${devtype} "     \
204                         "${devnum}:${distro_bootpart} "         \
205                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
206                         "env exists secureboot "        \
207                         "&& esbc_validate ${scripthdraddr};"    \
208                 "source ${scriptaddr}\0"          \
209         "qspi_bootcmd=echo Trying load from qspi..;"      \
210                 "sf probe && sf read $load_addr "         \
211                 "$kernel_start $kernel_size; env exists secureboot "    \
212                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
213                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
214                 "bootm $load_addr#$board\0"             \
215         "nand_bootcmd=echo Trying load from nand..;"      \
216                 "nand info; nand read $load_addr "         \
217                 "$kernel_start $kernel_size; env exists secureboot "    \
218                 "&& nand read $kernelheader_addr_r $kernelheader_start " \
219                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
220                 "bootm $load_addr#$board\0"             \
221         "nor_bootcmd=echo Trying load from nor..;"      \
222                 "cp.b $kernel_addr $load_addr "         \
223                 "$kernel_size; env exists secureboot "  \
224                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
225                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
226                 "bootm $load_addr#$board\0"     \
227         "sd_bootcmd=echo Trying load from SD ..;"       \
228                 "mmcinfo; mmc read $load_addr "         \
229                 "$kernel_addr_sd $kernel_size_sd && "   \
230                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
231                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
232                 " && esbc_validate ${kernelheader_addr_r};"     \
233                 "bootm $load_addr#$board\0"
234
235 #endif
236
237 /* Monitor Command Prompt */
238 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
239
240 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
241
242 #include <asm/arch/soc.h>
243
244 #endif /* __LS1046A_COMMON_H */