include/configs/ls1046a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2016 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1046A_COMMON_H
   8 #define __LS1046A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_QBMAN
  13 #define SPL_NO_FMAN
  14 #define SPL_NO_ENV
  15 #define SPL_NO_MISC
  16 #define SPL_NO_QSPI
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #endif
  20 #if defined(CONFIG_SPL_BUILD) && \
  21         (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
  22 #define SPL_NO_MMC
  23 #endif
  24 #if defined(CONFIG_SPL_BUILD)           && \
  25         !defined(CONFIG_SPL_FSL_LS_PPA)
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #define CONFIG_REMAKE_ELF
  30
  31 #include <asm/arch/config.h>
  32 #include <asm/arch/stream_id_lsch2.h>
  33
  34 /* Link Definitions */
  35 #ifdef CONFIG_TFABOOT
  36 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  37 #else
  38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  39 #endif
  40
  41 #define CONFIG_VERY_BIG_RAM
  42 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  43 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  44 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  45 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  46
  47 #define CPU_RELEASE_ADDR               secondary_boot_addr
  48
  49 /* Generic Timer Definitions */
  50 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
  51
  52 /* Size of malloc() pool */
  53 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  54
  55 /* Serial Port */
  56 #define CONFIG_SYS_NS16550_SERIAL
  57 #define CONFIG_SYS_NS16550_REG_SIZE     1
  58 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  59
  60 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  61
  62 /* SD boot SPL */
  63 #ifdef CONFIG_SD_BOOT
  64 #define CONFIG_SPL_MAX_SIZE             0x1f000         /* 124 KiB */
  65 #define CONFIG_SPL_STACK                0x10020000
  66 #define CONFIG_SPL_PAD_TO               0x21000         /* 132 KiB */
  67 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  68 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  69 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  70                                         CONFIG_SPL_BSS_MAX_SIZE)
  71 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  72
  73 #ifdef CONFIG_NXP_ESBC
  74 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  75 /*
  76  * HDR would be appended at end of image and copied to DDR along
  77  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  78  * size increases then increase this size in case of secure boot as
  79  * it uses raw u-boot image instead of fit image.
  80  */
  81 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  82 #else
  83 #define CONFIG_SYS_MONITOR_LEN          0x100000
  84 #endif /* ifdef CONFIG_NXP_ESBC */
  85 #endif
  86
  87 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
  88 #define CONFIG_SPL_TARGET               "spl/u-boot-spl.pbl"
  89 #define CONFIG_SPL_MAX_SIZE             0x1f000
  90 #define CONFIG_SPL_STACK                0x10020000
  91 #define CONFIG_SPL_PAD_TO               0x20000
  92 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  93 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  94 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  95                                         CONFIG_SPL_BSS_MAX_SIZE)
  96 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  97 #define CONFIG_SYS_MONITOR_LEN          0x100000
  98 #endif
  99
 100 /* NAND SPL */
 101 #ifdef CONFIG_NAND_BOOT
 102 #define CONFIG_SPL_PBL_PAD
 103 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 104 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 105 #define CONFIG_SPL_ENV_SUPPORT
 106 #define CONFIG_SPL_WATCHDOG
 107 #define CONFIG_SPL_I2C
 108
 109 #define CONFIG_SPL_NAND_SUPPORT
 110 #define CONFIG_SPL_DRIVERS_MISC
 111 #define CONFIG_SPL_MAX_SIZE             0x17000         /* 90 KiB */
 112 #define CONFIG_SPL_STACK                0x1001f000
 113 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 114 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 115
 116 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
 117 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 118 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
 119                                         CONFIG_SPL_BSS_MAX_SIZE)
 120 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 121 #define CONFIG_SYS_MONITOR_LEN          0xa0000
 122 #endif
 123
 124 /* GPIO */
 125 #ifdef CONFIG_DM_GPIO
 126 #ifndef CONFIG_MPC8XXX_GPIO
 127 #define CONFIG_MPC8XXX_GPIO
 128 #endif
 129 #endif
 130
 131 /* I2C */
 132
 133 /* PCIe */
 134 #define CONFIG_PCIE1            /* PCIE controller 1 */
 135 #define CONFIG_PCIE2            /* PCIE controller 2 */
 136 #define CONFIG_PCIE3            /* PCIE controller 3 */
 137
 138 #ifdef CONFIG_PCI
 139 #define CONFIG_PCI_SCAN_SHOW
 140 #endif
 141
 142 /* SATA */
 143 #ifndef SPL_NO_SATA
 144 #define CONFIG_SCSI_AHCI_PLAT
 145
 146 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
 147
 148 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
 149 #define CONFIG_SYS_SCSI_MAX_LUN                 1
 150 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 151                                                 CONFIG_SYS_SCSI_MAX_LUN)
 152 #endif
 153
 154 /* FMan ucode */
 155 #ifndef SPL_NO_FMAN
 156 #define CONFIG_SYS_DPAA_FMAN
 157 #ifdef CONFIG_SYS_DPAA_FMAN
 158 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 159 #endif
 160
 161 #ifdef CONFIG_TFABOOT
 162 #define CONFIG_SYS_FMAN_FW_ADDR         0x900000
 163 #else
 164 #ifdef CONFIG_SD_BOOT
 165 /*
 166  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
 167  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
 168  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
 169  */
 170 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
 171 #elif defined(CONFIG_QSPI_BOOT)
 172 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
 173 #elif defined(CONFIG_NAND_BOOT)
 174 #define CONFIG_SYS_FMAN_FW_ADDR         (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
 175 #else
 176 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
 177 #endif
 178 #endif
 179 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
 180 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 181 #endif
 182
 183 /* Miscellaneous configurable options */
 184
 185 #define CONFIG_HWCONFIG
 186 #define HWCONFIG_BUFFER_SIZE            128
 187
 188 #ifndef CONFIG_SPL_BUILD
 189 #define BOOT_TARGET_DEVICES(func) \
 190         func(SCSI, scsi, 0) \
 191         func(MMC, mmc, 0) \
 192         func(USB, usb, 0) \
 193         func(DHCP, dhcp, na)
 194 #include <config_distro_bootcmd.h>
 195 #endif
 196
 197 #if defined(CONFIG_TARGET_LS1046AFRWY)
 198 #define LS1046A_BOOT_SRC_AND_HDR\
 199         "boot_scripts=ls1046afrwy_boot.scr\0"   \
 200         "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
 201 #elif defined(CONFIG_TARGET_LS1046AQDS)
 202 #define LS1046A_BOOT_SRC_AND_HDR\
 203         "boot_scripts=ls1046aqds_boot.scr\0"    \
 204         "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
 205 #else
 206 #define LS1046A_BOOT_SRC_AND_HDR\
 207         "boot_scripts=ls1046ardb_boot.scr\0"    \
 208         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
 209 #endif
 210 #ifndef SPL_NO_MISC
 211 /* Initial environment variables */
 212 #define CONFIG_EXTRA_ENV_SETTINGS               \
 213         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 214         "ramdisk_addr=0x800000\0"               \
 215         "ramdisk_size=0x2000000\0"              \
 216         "bootm_size=0x10000000\0"               \
 217         "fdt_addr=0x64f00000\0"                 \
 218         "kernel_addr=0x61000000\0"              \
 219         "scriptaddr=0x80000000\0"               \
 220         "scripthdraddr=0x80080000\0"            \
 221         "fdtheader_addr_r=0x80100000\0"         \
 222         "kernelheader_addr_r=0x80200000\0"      \
 223         "load_addr=0xa0000000\0"            \
 224         "kernel_addr_r=0x81000000\0"            \
 225         "fdt_addr_r=0x90000000\0"               \
 226         "ramdisk_addr_r=0xa0000000\0"           \
 227         "kernel_start=0x1000000\0"              \
 228         "kernelheader_start=0x600000\0"         \
 229         "kernel_load=0xa0000000\0"              \
 230         "kernel_size=0x2800000\0"               \
 231         "kernelheader_size=0x40000\0"           \
 232         "kernel_addr_sd=0x8000\0"               \
 233         "kernel_size_sd=0x14000\0"              \
 234         "kernelhdr_addr_sd=0x3000\0"            \
 235         "kernelhdr_size_sd=0x10\0"              \
 236         "console=ttyS0,115200\0"                \
 237          CONFIG_MTDPARTS_DEFAULT "\0"           \
 238         BOOTENV                                 \
 239         LS1046A_BOOT_SRC_AND_HDR                \
 240         "scan_dev_for_boot_part="               \
 241                 "part list ${devtype} ${devnum} devplist; "   \
 242                 "env exists devplist || setenv devplist 1; "  \
 243                 "for distro_bootpart in ${devplist}; do "     \
 244                   "if fstype ${devtype} "                  \
 245                         "${devnum}:${distro_bootpart} "      \
 246                         "bootfstype; then "                  \
 247                         "run scan_dev_for_boot; "            \
 248                   "fi; "                                   \
 249                 "done\0"                                   \
 250         "boot_a_script="                                  \
 251                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
 252                         "${scriptaddr} ${prefix}${script}; "    \
 253                 "env exists secureboot && load ${devtype} "     \
 254                         "${devnum}:${distro_bootpart} "         \
 255                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 256                         "env exists secureboot "        \
 257                         "&& esbc_validate ${scripthdraddr};"    \
 258                 "source ${scriptaddr}\0"          \
 259         "qspi_bootcmd=echo Trying load from qspi..;"      \
 260                 "sf probe && sf read $load_addr "         \
 261                 "$kernel_start $kernel_size; env exists secureboot "    \
 262                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 263                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 264                 "bootm $load_addr#$board\0"             \
 265         "nand_bootcmd=echo Trying load from nand..;"      \
 266                 "nand info; nand read $load_addr "         \
 267                 "$kernel_start $kernel_size; env exists secureboot "    \
 268                 "&& nand read $kernelheader_addr_r $kernelheader_start " \
 269                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 270                 "bootm $load_addr#$board\0"             \
 271         "nor_bootcmd=echo Trying load from nor..;"      \
 272                 "cp.b $kernel_addr $load_addr "         \
 273                 "$kernel_size; env exists secureboot "  \
 274                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 275                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 276                 "bootm $load_addr#$board\0"     \
 277         "sd_bootcmd=echo Trying load from SD ..;"       \
 278                 "mmcinfo; mmc read $load_addr "         \
 279                 "$kernel_addr_sd $kernel_size_sd && "   \
 280                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 281                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 282                 " && esbc_validate ${kernelheader_addr_r};"     \
 283                 "bootm $load_addr#$board\0"
 284
 285 #endif
 286
 287 /* Monitor Command Prompt */
 288 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 289
 290 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 291
 292 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 293
 294 #include <asm/arch/soc.h>
 295
 296 #endif /* __LS1046A_COMMON_H */