include/configs/ls1046a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2016 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1046A_COMMON_H
   8 #define __LS1046A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_QBMAN
  13 #define SPL_NO_FMAN
  14 #define SPL_NO_ENV
  15 #define SPL_NO_MISC
  16 #define SPL_NO_QSPI
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #endif
  20 #if defined(CONFIG_SPL_BUILD) && \
  21         (defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
  22 #define SPL_NO_MMC
  23 #endif
  24 #if defined(CONFIG_SPL_BUILD)           && \
  25         !defined(CONFIG_SPL_FSL_LS_PPA)
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #include <asm/arch/config.h>
  30 #include <asm/arch/stream_id_lsch2.h>
  31
  32 /* Link Definitions */
  33 #ifdef CONFIG_TFABOOT
  34 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  35 #else
  36 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  37 #endif
  38
  39 #define CONFIG_VERY_BIG_RAM
  40 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  41 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  42 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  43 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  44
  45 #define CPU_RELEASE_ADDR               secondary_boot_addr
  46
  47 /* Serial Port */
  48 #define CONFIG_SYS_NS16550_SERIAL
  49 #define CONFIG_SYS_NS16550_REG_SIZE     1
  50 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  51
  52 /* SD boot SPL */
  53 #ifdef CONFIG_SD_BOOT
  54 #define CONFIG_SPL_STACK                0x10020000
  55 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  56 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  57                                         CONFIG_SPL_BSS_MAX_SIZE)
  58 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  59
  60 #ifdef CONFIG_NXP_ESBC
  61 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  62 /*
  63  * HDR would be appended at end of image and copied to DDR along
  64  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  65  * size increases then increase this size in case of secure boot as
  66  * it uses raw u-boot image instead of fit image.
  67  */
  68 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  69 #else
  70 #define CONFIG_SYS_MONITOR_LEN          0x100000
  71 #endif /* ifdef CONFIG_NXP_ESBC */
  72 #endif
  73
  74 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
  75 #define CONFIG_SPL_TARGET               "spl/u-boot-spl.pbl"
  76 #define CONFIG_SPL_STACK                0x10020000
  77 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  78 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  79                                         CONFIG_SPL_BSS_MAX_SIZE)
  80 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  81 #define CONFIG_SYS_MONITOR_LEN          0x100000
  82 #endif
  83
  84 /* NAND SPL */
  85 #ifdef CONFIG_NAND_BOOT
  86 #define CONFIG_SPL_STACK                0x1001f000
  87 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  88 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  89
  90 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  91 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  92                                         CONFIG_SPL_BSS_MAX_SIZE)
  93 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  94 #define CONFIG_SYS_MONITOR_LEN          0xa0000
  95 #endif
  96
  97 /* GPIO */
  98
  99 /* I2C */
 100
 101 /* PCIe */
 102 #define CONFIG_PCIE1            /* PCIE controller 1 */
 103 #define CONFIG_PCIE2            /* PCIE controller 2 */
 104 #define CONFIG_PCIE3            /* PCIE controller 3 */
 105
 106 #ifdef CONFIG_PCI
 107 #define CONFIG_PCI_SCAN_SHOW
 108 #endif
 109
 110 /* SATA */
 111 #ifndef SPL_NO_SATA
 112 #define CONFIG_SYS_SATA                         AHCI_BASE_ADDR
 113 #endif
 114
 115 /* FMan ucode */
 116 #ifndef SPL_NO_FMAN
 117 #define CONFIG_SYS_DPAA_FMAN
 118 #ifdef CONFIG_SYS_DPAA_FMAN
 119 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 120 #endif
 121 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 122 #endif
 123
 124 /* Miscellaneous configurable options */
 125
 126 #define CONFIG_HWCONFIG
 127 #define HWCONFIG_BUFFER_SIZE            128
 128
 129 #ifndef CONFIG_SPL_BUILD
 130 #define BOOT_TARGET_DEVICES(func) \
 131         func(SCSI, scsi, 0) \
 132         func(MMC, mmc, 0) \
 133         func(USB, usb, 0) \
 134         func(DHCP, dhcp, na)
 135 #include <config_distro_bootcmd.h>
 136 #endif
 137
 138 #if defined(CONFIG_TARGET_LS1046AFRWY)
 139 #define LS1046A_BOOT_SRC_AND_HDR\
 140         "boot_scripts=ls1046afrwy_boot.scr\0"   \
 141         "boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
 142 #elif defined(CONFIG_TARGET_LS1046AQDS)
 143 #define LS1046A_BOOT_SRC_AND_HDR\
 144         "boot_scripts=ls1046aqds_boot.scr\0"    \
 145         "boot_script_hdr=hdr_ls1046aqds_bs.out\0"
 146 #else
 147 #define LS1046A_BOOT_SRC_AND_HDR\
 148         "boot_scripts=ls1046ardb_boot.scr\0"    \
 149         "boot_script_hdr=hdr_ls1046ardb_bs.out\0"
 150 #endif
 151 #ifndef SPL_NO_MISC
 152 /* Initial environment variables */
 153 #define CONFIG_EXTRA_ENV_SETTINGS               \
 154         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 155         "ramdisk_addr=0x800000\0"               \
 156         "ramdisk_size=0x2000000\0"              \
 157         "bootm_size=0x10000000\0"               \
 158         "kernel_addr=0x61000000\0"              \
 159         "scriptaddr=0x80000000\0"               \
 160         "scripthdraddr=0x80080000\0"            \
 161         "fdtheader_addr_r=0x80100000\0"         \
 162         "kernelheader_addr_r=0x80200000\0"      \
 163         "load_addr=0xa0000000\0"            \
 164         "kernel_addr_r=0x81000000\0"            \
 165         "fdt_addr_r=0x90000000\0"               \
 166         "ramdisk_addr_r=0xa0000000\0"           \
 167         "kernel_start=0x1000000\0"              \
 168         "kernelheader_start=0x600000\0"         \
 169         "kernel_load=0xa0000000\0"              \
 170         "kernel_size=0x2800000\0"               \
 171         "kernelheader_size=0x40000\0"           \
 172         "kernel_addr_sd=0x8000\0"               \
 173         "kernel_size_sd=0x14000\0"              \
 174         "kernelhdr_addr_sd=0x3000\0"            \
 175         "kernelhdr_size_sd=0x10\0"              \
 176         "console=ttyS0,115200\0"                \
 177          CONFIG_MTDPARTS_DEFAULT "\0"           \
 178         BOOTENV                                 \
 179         LS1046A_BOOT_SRC_AND_HDR                \
 180         "scan_dev_for_boot_part="               \
 181                 "part list ${devtype} ${devnum} devplist; "   \
 182                 "env exists devplist || setenv devplist 1; "  \
 183                 "for distro_bootpart in ${devplist}; do "     \
 184                   "if fstype ${devtype} "                  \
 185                         "${devnum}:${distro_bootpart} "      \
 186                         "bootfstype; then "                  \
 187                         "run scan_dev_for_boot; "            \
 188                   "fi; "                                   \
 189                 "done\0"                                   \
 190         "boot_a_script="                                  \
 191                 "load ${devtype} ${devnum}:${distro_bootpart} "  \
 192                         "${scriptaddr} ${prefix}${script}; "    \
 193                 "env exists secureboot && load ${devtype} "     \
 194                         "${devnum}:${distro_bootpart} "         \
 195                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 196                         "env exists secureboot "        \
 197                         "&& esbc_validate ${scripthdraddr};"    \
 198                 "source ${scriptaddr}\0"          \
 199         "qspi_bootcmd=echo Trying load from qspi..;"      \
 200                 "sf probe && sf read $load_addr "         \
 201                 "$kernel_start $kernel_size; env exists secureboot "    \
 202                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 203                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 204                 "bootm $load_addr#$board\0"             \
 205         "nand_bootcmd=echo Trying load from nand..;"      \
 206                 "nand info; nand read $load_addr "         \
 207                 "$kernel_start $kernel_size; env exists secureboot "    \
 208                 "&& nand read $kernelheader_addr_r $kernelheader_start " \
 209                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 210                 "bootm $load_addr#$board\0"             \
 211         "nor_bootcmd=echo Trying load from nor..;"      \
 212                 "cp.b $kernel_addr $load_addr "         \
 213                 "$kernel_size; env exists secureboot "  \
 214                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 215                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 216                 "bootm $load_addr#$board\0"     \
 217         "sd_bootcmd=echo Trying load from SD ..;"       \
 218                 "mmcinfo; mmc read $load_addr "         \
 219                 "$kernel_addr_sd $kernel_size_sd && "   \
 220                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 221                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 222                 " && esbc_validate ${kernelheader_addr_r};"     \
 223                 "bootm $load_addr#$board\0"
 224
 225 #endif
 226
 227 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 228
 229 #include <asm/arch/soc.h>
 230
 231 #endif /* __LS1046A_COMMON_H */