2 * Copyright 2016 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __LS1046A_COMMON_H
8 #define __LS1046A_COMMON_H
10 #define CONFIG_REMAKE_ELF
11 #define CONFIG_FSL_LAYERSCAPE
12 #define CONFIG_FSL_LSCH2
14 #define CONFIG_SYS_FSL_CLK
17 #include <asm/arch/config.h>
18 #ifdef CONFIG_SYS_FSL_SRDS_1
19 #define CONFIG_SYS_HAS_SERDES
22 /* Link Definitions */
23 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
25 #define CONFIG_SUPPORT_RAW_INITRD
27 #define CONFIG_SKIP_LOWLEVEL_INIT
28 #define CONFIG_BOARD_EARLY_INIT_F 1
30 #define CONFIG_VERY_BIG_RAM
31 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
32 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
33 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
34 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
36 #define CPU_RELEASE_ADDR secondary_boot_func
38 /* Generic Timer Definitions */
39 #define COUNTER_FREQUENCY 25000000 /* 25MHz */
41 /* Size of malloc() pool */
42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
45 #define CONFIG_CONS_INDEX 1
46 #define CONFIG_SYS_NS16550_SERIAL
47 #define CONFIG_SYS_NS16550_REG_SIZE 1
48 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
50 #define CONFIG_BAUDRATE 115200
51 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
55 #define CONFIG_SPL_FRAMEWORK
56 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
57 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
58 #define CONFIG_SPL_LIBCOMMON_SUPPORT
59 #define CONFIG_SPL_LIBGENERIC_SUPPORT
60 #define CONFIG_SPL_ENV_SUPPORT
61 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
62 #define CONFIG_SPL_WATCHDOG_SUPPORT
63 #define CONFIG_SPL_I2C_SUPPORT
64 #define CONFIG_SPL_SERIAL_SUPPORT
65 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
67 #define CONFIG_SPL_MMC_SUPPORT
68 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x110
69 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x500
70 #define CONFIG_SPL_TEXT_BASE 0x10000000
71 #define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */
72 #define CONFIG_SPL_STACK 0x10020000
73 #define CONFIG_SPL_PAD_TO 0x21000 /* 132 KiB */
74 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000
75 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
76 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
77 CONFIG_SPL_BSS_MAX_SIZE)
78 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
79 #define CONFIG_SYS_MONITOR_LEN 0xa0000
83 #ifdef CONFIG_NAND_BOOT
84 #define CONFIG_SPL_PBL_PAD
85 #define CONFIG_SPL_FRAMEWORK
86 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
87 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
88 #define CONFIG_SPL_LIBCOMMON_SUPPORT
89 #define CONFIG_SPL_LIBGENERIC_SUPPORT
90 #define CONFIG_SPL_ENV_SUPPORT
91 #define CONFIG_SPL_WATCHDOG_SUPPORT
92 #define CONFIG_SPL_I2C_SUPPORT
93 #define CONFIG_SPL_SERIAL_SUPPORT
94 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
96 #define CONFIG_SPL_NAND_SUPPORT
97 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
98 #define CONFIG_SPL_TEXT_BASE 0x10000000
99 #define CONFIG_SPL_MAX_SIZE 0x1d000 /* 116 KiB */
100 #define CONFIG_SPL_STACK 0x1001f000
101 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
102 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
104 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000
105 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
106 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
107 CONFIG_SPL_BSS_MAX_SIZE)
108 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
109 #define CONFIG_SYS_MONITOR_LEN 0xa0000
113 #define CONFIG_SYS_I2C
114 #define CONFIG_SYS_I2C_MXC
115 #define CONFIG_SYS_I2C_MXC_I2C1
116 #define CONFIG_SYS_I2C_MXC_I2C2
117 #define CONFIG_SYS_I2C_MXC_I2C3
118 #define CONFIG_SYS_I2C_MXC_I2C4
120 /* Command line configuration */
121 #define CONFIG_CMD_ENV
126 #define CONFIG_FSL_ESDHC
127 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
128 #define CONFIG_GENERIC_MMC
129 #define CONFIG_DOS_PARTITION
132 #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
134 #define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
137 #define CONFIG_SYS_DPAA_FMAN
138 #ifdef CONFIG_SYS_DPAA_FMAN
139 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000
141 #ifdef CONFIG_SD_BOOT
143 * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
144 * about 1MB (2048 blocks), Env is stored after the image, and the env size is
145 * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820).
147 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
148 #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
149 #elif defined(CONFIG_QSPI_BOOT)
150 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
151 #define CONFIG_SYS_FMAN_FW_ADDR 0x40300000
152 #define CONFIG_ENV_SPI_BUS 0
153 #define CONFIG_ENV_SPI_CS 0
154 #define CONFIG_ENV_SPI_MAX_HZ 1000000
155 #define CONFIG_ENV_SPI_MODE 0x03
156 #elif defined(CONFIG_NAND_BOOT)
157 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
158 #define CONFIG_SYS_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
160 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
161 #define CONFIG_SYS_FMAN_FW_ADDR 0x60300000
163 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
164 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
167 /* Miscellaneous configurable options */
168 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
169 #define CONFIG_ARCH_EARLY_INIT_R
170 #define CONFIG_BOARD_LATE_INIT
172 #define CONFIG_HWCONFIG
173 #define HWCONFIG_BUFFER_SIZE 128
175 /* Initial environment variables */
176 #define CONFIG_EXTRA_ENV_SETTINGS \
177 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
178 "loadaddr=0x80100000\0" \
179 "ramdisk_addr=0x800000\0" \
180 "ramdisk_size=0x2000000\0" \
181 "fdt_high=0xffffffffffffffff\0" \
182 "initrd_high=0xffffffffffffffff\0" \
183 "kernel_start=0x1000000\0" \
184 "kernel_load=0xa0000000\0" \
185 "kernel_size=0x2800000\0" \
186 "console=ttyS0,115200\0" \
187 MTDPARTS_DEFAULT "\0"
189 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
190 "earlycon=uart8250,mmio,0x21c0500 " \
192 /* Monitor Command Prompt */
193 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
194 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
195 sizeof(CONFIG_SYS_PROMPT) + 16)
196 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
197 #define CONFIG_SYS_LONGHELP
198 #define CONFIG_CMDLINE_EDITING 1
199 #define CONFIG_AUTO_COMPLETE
200 #define CONFIG_SYS_MAXARGS 64 /* max command args */
202 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
204 /* Hash command with SHA acceleration supported in hardware */
205 #ifdef CONFIG_FSL_CAAM
206 #define CONFIG_CMD_HASH
207 #define CONFIG_SHA_HW_ACCEL
210 #endif /* __LS1046A_COMMON_H */