Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig
[platform/kernel/u-boot.git] / include / configs / ls1043a_common.h
1 /*
2  * Copyright (C) 2015 Freescale Semiconductor
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #ifndef __LS1043A_COMMON_H
8 #define __LS1043A_COMMON_H
9
10 /* SPL build */
11 #ifdef CONFIG_SPL_BUILD
12 #define SPL_NO_FMAN
13 #define SPL_NO_DSPI
14 #define SPL_NO_PCIE
15 #define SPL_NO_ENV
16 #define SPL_NO_MISC
17 #define SPL_NO_USB
18 #define SPL_NO_SATA
19 #define SPL_NO_QE
20 #define SPL_NO_EEPROM
21 #endif
22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
23 #define SPL_NO_MMC
24 #endif
25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
26 #define SPL_NO_IFC
27 #endif
28
29 #define CONFIG_REMAKE_ELF
30 #define CONFIG_FSL_LAYERSCAPE
31 #define CONFIG_MP
32 #define CONFIG_GICV2
33
34 #include <asm/arch/stream_id_lsch2.h>
35 #include <asm/arch/config.h>
36
37 /* Link Definitions */
38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
39
40 #define CONFIG_SKIP_LOWLEVEL_INIT
41
42 #define CONFIG_VERY_BIG_RAM
43 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
44 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
45 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
46 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
47
48 #define CPU_RELEASE_ADDR               secondary_boot_func
49
50 /* Generic Timer Definitions */
51 #define COUNTER_FREQUENCY               25000000        /* 25MHz */
52
53 /* Size of malloc() pool */
54 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
55
56 /* Serial Port */
57 #define CONFIG_CONS_INDEX               1
58 #define CONFIG_SYS_NS16550_SERIAL
59 #define CONFIG_SYS_NS16550_REG_SIZE     1
60 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
61
62 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
63
64 /* SD boot SPL */
65 #ifdef CONFIG_SD_BOOT
66 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
67
68 #define CONFIG_SPL_TEXT_BASE            0x10000000
69 #define CONFIG_SPL_MAX_SIZE             0x17000
70 #define CONFIG_SPL_STACK                0x1001e000
71 #define CONFIG_SPL_PAD_TO               0x1d000
72
73 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
74                                         CONFIG_SPL_BSS_MAX_SIZE)
75 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
76 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
77 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
78
79 #ifdef CONFIG_SECURE_BOOT
80 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
81 /*
82  * HDR would be appended at end of image and copied to DDR along
83  * with U-Boot image. Here u-boot max. size is 512K. So if binary
84  * size increases then increase this size in case of secure boot as
85  * it uses raw u-boot image instead of fit image.
86  */
87 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
88 #else
89 #define CONFIG_SYS_MONITOR_LEN          0x100000
90 #endif /* ifdef CONFIG_SECURE_BOOT */
91 #endif
92
93 /* NAND SPL */
94 #ifdef CONFIG_NAND_BOOT
95 #define CONFIG_SPL_PBL_PAD
96 #define CONFIG_SPL_TARGET               "u-boot-with-spl.bin"
97 #define CONFIG_SPL_TEXT_BASE            0x10000000
98 #define CONFIG_SPL_MAX_SIZE             0x1a000
99 #define CONFIG_SPL_STACK                0x1001d000
100 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
101 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
102 #define CONFIG_SYS_SPL_MALLOC_START     0x80200000
103 #define CONFIG_SPL_BSS_START_ADDR       0x80100000
104 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
105 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
106
107 #ifdef CONFIG_SECURE_BOOT
108 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
109 #endif /* ifdef CONFIG_SECURE_BOOT */
110
111 #ifdef CONFIG_U_BOOT_HDR_SIZE
112 /*
113  * HDR would be appended at end of image and copied to DDR along
114  * with U-Boot image. Here u-boot max. size is 512K. So if binary
115  * size increases then increase this size in case of secure boot as
116  * it uses raw u-boot image instead of fit image.
117  */
118 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
119 #else
120 #define CONFIG_SYS_MONITOR_LEN          0x100000
121 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
122
123 #endif
124
125 /* IFC */
126 #ifndef SPL_NO_IFC
127 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
128 #define CONFIG_FSL_IFC
129 /*
130  * CONFIG_SYS_FLASH_BASE has the final address (core view)
131  * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
132  * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
133  * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
134  */
135 #define CONFIG_SYS_FLASH_BASE                   0x60000000
136 #define CONFIG_SYS_FLASH_BASE_PHYS              CONFIG_SYS_FLASH_BASE
137 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY        0x00000000
138
139 #ifdef CONFIG_MTD_NOR_FLASH
140 #define CONFIG_FLASH_CFI_DRIVER
141 #define CONFIG_SYS_FLASH_CFI
142 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
143 #define CONFIG_SYS_FLASH_QUIET_TEST
144 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
145 #endif
146 #endif
147 #endif
148
149 /* I2C */
150 #define CONFIG_SYS_I2C
151 #define CONFIG_SYS_I2C_MXC
152 #define CONFIG_SYS_I2C_MXC_I2C1
153 #define CONFIG_SYS_I2C_MXC_I2C2
154 #define CONFIG_SYS_I2C_MXC_I2C3
155 #define CONFIG_SYS_I2C_MXC_I2C4
156
157 /* PCIe */
158 #ifndef SPL_NO_PCIE
159 #define CONFIG_PCIE1            /* PCIE controller 1 */
160 #define CONFIG_PCIE2            /* PCIE controller 2 */
161 #define CONFIG_PCIE3            /* PCIE controller 3 */
162
163 #ifdef CONFIG_PCI
164 #define CONFIG_PCI_SCAN_SHOW
165 #endif
166 #endif
167
168 /* Command line configuration */
169
170 /*  MMC  */
171 #ifndef SPL_NO_MMC
172 #ifdef CONFIG_MMC
173 #define CONFIG_FSL_ESDHC
174 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
175 #endif
176 #endif
177
178 /*  DSPI  */
179 #ifndef SPL_NO_DSPI
180 #define CONFIG_FSL_DSPI
181 #ifdef CONFIG_FSL_DSPI
182 #define CONFIG_DM_SPI_FLASH
183 #define CONFIG_SPI_FLASH_STMICRO        /* cs0 */
184 #define CONFIG_SPI_FLASH_SST            /* cs1 */
185 #define CONFIG_SPI_FLASH_EON            /* cs2 */
186 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
187 #define CONFIG_SF_DEFAULT_BUS           1
188 #define CONFIG_SF_DEFAULT_CS            0
189 #endif
190 #endif
191 #endif
192
193 /* FMan ucode */
194 #ifndef SPL_NO_FMAN
195 #define CONFIG_SYS_DPAA_FMAN
196 #ifdef CONFIG_SYS_DPAA_FMAN
197 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
198
199 #ifdef CONFIG_NAND_BOOT
200 /* Store Fman ucode at offeset 0x900000(72 blocks). */
201 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
202 #define CONFIG_SYS_FMAN_FW_ADDR         (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
203 #elif defined(CONFIG_SD_BOOT)
204 /*
205  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
206  * about 1MB (2040 blocks), Env is stored after the image, and the env size is
207  * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
208  */
209 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
210 #define CONFIG_SYS_FMAN_FW_ADDR         (512 * 0x4800)
211 #define CONFIG_SYS_QE_FW_ADDR           (512 * 0x4a08)
212 #elif defined(CONFIG_QSPI_BOOT)
213 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
214 #define CONFIG_SYS_FMAN_FW_ADDR         0x40900000
215 #define CONFIG_ENV_SPI_BUS              0
216 #define CONFIG_ENV_SPI_CS               0
217 #define CONFIG_ENV_SPI_MAX_HZ           1000000
218 #define CONFIG_ENV_SPI_MODE             0x03
219 #else
220 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
221 /* FMan fireware Pre-load address */
222 #define CONFIG_SYS_FMAN_FW_ADDR         0x60900000
223 #define CONFIG_SYS_QE_FW_ADDR           0x60940000
224 #endif
225 #define CONFIG_SYS_QE_FMAN_FW_LENGTH    0x10000
226 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
227 #endif
228 #endif
229
230 /* Miscellaneous configurable options */
231 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
232
233 #define CONFIG_HWCONFIG
234 #define HWCONFIG_BUFFER_SIZE            128
235
236 #ifndef SPL_NO_MISC
237 #include <config_distro_defaults.h>
238 #ifndef CONFIG_SPL_BUILD
239 #define BOOT_TARGET_DEVICES(func) \
240         func(MMC, mmc, 0) \
241         func(USB, usb, 0)
242 #include <config_distro_bootcmd.h>
243 #endif
244
245 /* Initial environment variables */
246 #define CONFIG_EXTRA_ENV_SETTINGS               \
247         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
248         "fdt_high=0xffffffffffffffff\0"         \
249         "initrd_high=0xffffffffffffffff\0"      \
250         "fdt_addr=0x64f00000\0"                 \
251         "kernel_addr=0x61000000\0"              \
252         "scriptaddr=0x80000000\0"               \
253         "scripthdraddr=0x80080000\0"            \
254         "fdtheader_addr_r=0x80100000\0"         \
255         "kernelheader_addr_r=0x80200000\0"      \
256         "kernel_addr_r=0x81000000\0"            \
257         "fdt_addr_r=0x90000000\0"               \
258         "load_addr=0xa0000000\0"                \
259         "kernelheader_addr=0x60800000\0"        \
260         "kernel_size=0x2800000\0"               \
261         "kernelheader_size=0x40000\0"           \
262         "kernel_addr_sd=0x8000\0"               \
263         "kernel_size_sd=0x14000\0"              \
264         "kernelhdr_addr_sd=0x4000\0"            \
265         "kernelhdr_size_sd=0x10\0"              \
266         "console=ttyS0,115200\0"                \
267         "boot_os=y\0"                           \
268         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"        \
269         BOOTENV                                 \
270         "boot_scripts=ls1043ardb_boot.scr\0"    \
271         "boot_script_hdr=hdr_ls1043ardb_bs.out\0"       \
272         "scan_dev_for_boot_part="               \
273                 "part list ${devtype} ${devnum} devplist; "     \
274                 "env exists devplist || setenv devplist 1; "    \
275                 "for distro_bootpart in ${devplist}; do "       \
276                         "if fstype ${devtype} "                 \
277                                 "${devnum}:${distro_bootpart} " \
278                                 "bootfstype; then "             \
279                                 "run scan_dev_for_boot; "       \
280                         "fi; "                                  \
281                 "done\0"                        \
282         "scan_dev_for_boot="                                    \
283                 "echo Scanning ${devtype} "                     \
284                         "${devnum}:${distro_bootpart}...; "     \
285                 "for prefix in ${boot_prefixes}; do "           \
286                         "run scan_dev_for_scripts; "            \
287                 "done;\0"                                       \
288         "boot_a_script="                                        \
289                 "load ${devtype} ${devnum}:${distro_bootpart} " \
290                         "${scriptaddr} ${prefix}${script}; "    \
291                 "env exists secureboot && load ${devtype} "     \
292                         "${devnum}:${distro_bootpart} "         \
293                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
294                         "&& esbc_validate ${scripthdraddr};"    \
295                 "source ${scriptaddr}\0"                        \
296         "qspi_bootcmd=echo Trying load from qspi..;"    \
297                 "sf probe && sf read $load_addr "       \
298                 "$kernel_addr $kernel_size; env exists secureboot "     \
299                 "&& sf read $kernelheader_addr_r $kernelheader_addr "   \
300                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
301                 "bootm $load_addr#$board\0"     \
302         "nor_bootcmd=echo Trying load from nor..;"      \
303                 "cp.b $kernel_addr $load_addr " \
304                 "$kernel_size; env exists secureboot "  \
305                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
306                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
307                 "bootm $load_addr#$board\0"         \
308         "sd_bootcmd=echo Trying load from SD ..;"       \
309                 "mmcinfo; mmc read $load_addr "         \
310                 "$kernel_addr_sd $kernel_size_sd && "     \
311                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
312                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
313                 " && esbc_validate ${kernelheader_addr_r};"     \
314                 "bootm $load_addr#$board\0"
315
316
317 #undef CONFIG_BOOTCOMMAND
318 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
319 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "     \
320                            "env exists secureboot && esbc_halt;"
321 #elif defined(CONFIG_SD_BOOT)
322 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
323                            "env exists secureboot && esbc_halt;"
324 #else
325 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "      \
326                            "env exists secureboot && esbc_halt;"
327 #endif
328 #endif
329
330 /* Monitor Command Prompt */
331 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
332
333 #define CONFIG_SYS_MAXARGS              64      /* max command args */
334
335 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
336
337 #include <asm/arch/soc.h>
338
339 #endif /* __LS1043A_COMMON_H */