include/configs/ls1043a_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor
   4  * Copyright 2019-2021 NXP
   5  */
   6
   7 #ifndef __LS1043A_COMMON_H
   8 #define __LS1043A_COMMON_H
   9
  10 /* SPL build */
  11 #ifdef CONFIG_SPL_BUILD
  12 #define SPL_NO_FMAN
  13 #define SPL_NO_DSPI
  14 #define SPL_NO_PCIE
  15 #define SPL_NO_ENV
  16 #define SPL_NO_MISC
  17 #define SPL_NO_USB
  18 #define SPL_NO_SATA
  19 #define SPL_NO_QE
  20 #define SPL_NO_EEPROM
  21 #endif
  22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
  23 #define SPL_NO_MMC
  24 #endif
  25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
  26 #define SPL_NO_IFC
  27 #endif
  28
  29 #include <asm/arch/stream_id_lsch2.h>
  30 #include <asm/arch/config.h>
  31
  32 /* Link Definitions */
  33 #ifdef CONFIG_TFABOOT
  34 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_TEXT_BASE
  35 #else
  36 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
  37 #endif
  38
  39 #define CONFIG_VERY_BIG_RAM
  40 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
  41 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY       0
  42 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  43 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
  44
  45 #define CPU_RELEASE_ADDR               secondary_boot_addr
  46
  47 /* Serial Port */
  48 #define CONFIG_SYS_NS16550_SERIAL
  49 #define CONFIG_SYS_NS16550_REG_SIZE     1
  50 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
  51
  52 /* SD boot SPL */
  53 #ifdef CONFIG_SD_BOOT
  54
  55 #define CONFIG_SPL_MAX_SIZE             0x17000
  56 #define CONFIG_SPL_STACK                0x1001e000
  57 #define CONFIG_SPL_PAD_TO               0x1d000
  58
  59 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
  60                                         CONFIG_SPL_BSS_MAX_SIZE)
  61 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  62 #define CONFIG_SPL_BSS_START_ADDR       0x8f000000
  63 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  64
  65 #ifdef CONFIG_NXP_ESBC
  66 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  67 /*
  68  * HDR would be appended at end of image and copied to DDR along
  69  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  70  * size increases then increase this size in case of secure boot as
  71  * it uses raw u-boot image instead of fit image.
  72  */
  73 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
  74 #else
  75 #define CONFIG_SYS_MONITOR_LEN          0x100000
  76 #endif /* ifdef CONFIG_NXP_ESBC */
  77 #endif
  78
  79 /* NAND SPL */
  80 #ifdef CONFIG_NAND_BOOT
  81 #define CONFIG_SPL_PBL_PAD
  82 #define CONFIG_SPL_MAX_SIZE             0x1a000
  83 #define CONFIG_SPL_STACK                0x1001d000
  84 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
  85 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
  86 #define CONFIG_SYS_SPL_MALLOC_START     0x80200000
  87 #define CONFIG_SPL_BSS_START_ADDR       0x80100000
  88 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
  89 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  90
  91 #ifdef CONFIG_NXP_ESBC
  92 #define CONFIG_U_BOOT_HDR_SIZE                          (16 << 10)
  93 #endif /* ifdef CONFIG_NXP_ESBC */
  94
  95 #ifdef CONFIG_U_BOOT_HDR_SIZE
  96 /*
  97  * HDR would be appended at end of image and copied to DDR along
  98  * with U-Boot image. Here u-boot max. size is 512K. So if binary
  99  * size increases then increase this size in case of secure boot as
 100  * it uses raw u-boot image instead of fit image.
 101  */
 102 #define CONFIG_SYS_MONITOR_LEN          (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
 103 #else
 104 #define CONFIG_SYS_MONITOR_LEN          0x100000
 105 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
 106
 107 #endif
 108
 109 /* GPIO */
 110
 111 /* IFC */
 112 #ifndef SPL_NO_IFC
 113 #if defined(CONFIG_TFABOOT) || \
 114         (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
 115 /*
 116  * CONFIG_SYS_FLASH_BASE has the final address (core view)
 117  * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
 118  * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
 119  * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
 120  */
 121 #define CONFIG_SYS_FLASH_BASE                   0x60000000
 122 #define CONFIG_SYS_FLASH_BASE_PHYS              CONFIG_SYS_FLASH_BASE
 123 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY        0x00000000
 124
 125 #ifdef CONFIG_MTD_NOR_FLASH
 126 #define CONFIG_SYS_FLASH_QUIET_TEST
 127 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 128 #endif
 129 #endif
 130 #endif
 131
 132 /* I2C */
 133
 134 /* PCIe */
 135 #ifndef SPL_NO_PCIE
 136 #define CONFIG_PCIE1            /* PCIE controller 1 */
 137 #define CONFIG_PCIE2            /* PCIE controller 2 */
 138 #define CONFIG_PCIE3            /* PCIE controller 3 */
 139
 140 #ifdef CONFIG_PCI
 141 #define CONFIG_PCI_SCAN_SHOW
 142 #endif
 143 #endif
 144
 145 /*  DSPI  */
 146
 147 /* FMan ucode */
 148 #ifndef SPL_NO_FMAN
 149 #define CONFIG_SYS_DPAA_FMAN
 150 #ifdef CONFIG_SYS_DPAA_FMAN
 151 #define CONFIG_SYS_FM_MURAM_SIZE        0x60000
 152
 153 #define CONFIG_SYS_FDT_PAD              (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 154 #endif
 155 #endif
 156
 157 /* Miscellaneous configurable options */
 158
 159 #define CONFIG_HWCONFIG
 160 #define HWCONFIG_BUFFER_SIZE            128
 161
 162 #ifndef SPL_NO_MISC
 163 #ifndef CONFIG_SPL_BUILD
 164 #define BOOT_TARGET_DEVICES(func) \
 165         func(MMC, mmc, 0) \
 166         func(USB, usb, 0) \
 167         func(DHCP, dhcp, na)
 168 #include <config_distro_bootcmd.h>
 169 #endif
 170
 171 /* Initial environment variables */
 172 #define CONFIG_EXTRA_ENV_SETTINGS               \
 173         "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
 174         "fdt_high=0xffffffffffffffff\0"         \
 175         "initrd_high=0xffffffffffffffff\0"      \
 176         "kernel_addr=0x61000000\0"              \
 177         "scriptaddr=0x80000000\0"               \
 178         "scripthdraddr=0x80080000\0"            \
 179         "fdtheader_addr_r=0x80100000\0"         \
 180         "kernelheader_addr_r=0x80200000\0"      \
 181         "kernel_addr_r=0x81000000\0"            \
 182         "kernel_start=0x1000000\0"              \
 183         "kernelheader_start=0x800000\0"         \
 184         "fdt_addr_r=0x90000000\0"               \
 185         "load_addr=0xa0000000\0"                \
 186         "kernelheader_addr=0x60600000\0"        \
 187         "kernel_size=0x2800000\0"               \
 188         "kernelheader_size=0x40000\0"           \
 189         "kernel_addr_sd=0x8000\0"               \
 190         "kernel_size_sd=0x14000\0"              \
 191         "kernelhdr_addr_sd=0x3000\0"            \
 192         "kernelhdr_size_sd=0x10\0"              \
 193         "console=ttyS0,115200\0"                \
 194         "boot_os=y\0"                           \
 195         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"        \
 196         BOOTENV                                 \
 197         "boot_scripts=ls1043ardb_boot.scr\0"    \
 198         "boot_script_hdr=hdr_ls1043ardb_bs.out\0"       \
 199         "scan_dev_for_boot_part="               \
 200                 "part list ${devtype} ${devnum} devplist; "     \
 201                 "env exists devplist || setenv devplist 1; "    \
 202                 "for distro_bootpart in ${devplist}; do "       \
 203                         "if fstype ${devtype} "                 \
 204                                 "${devnum}:${distro_bootpart} " \
 205                                 "bootfstype; then "             \
 206                                 "run scan_dev_for_boot; "       \
 207                         "fi; "                                  \
 208                 "done\0"                        \
 209         "boot_a_script="                                        \
 210                 "load ${devtype} ${devnum}:${distro_bootpart} " \
 211                         "${scriptaddr} ${prefix}${script}; "    \
 212                 "env exists secureboot && load ${devtype} "     \
 213                         "${devnum}:${distro_bootpart} "         \
 214                         "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
 215                         "env exists secureboot "        \
 216                         "&& esbc_validate ${scripthdraddr};"    \
 217                 "source ${scriptaddr}\0"                        \
 218         "qspi_bootcmd=echo Trying load from qspi..;"    \
 219                 "sf probe && sf read $load_addr "       \
 220                 "$kernel_start $kernel_size; env exists secureboot "    \
 221                 "&& sf read $kernelheader_addr_r $kernelheader_start "  \
 222                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 223                 "bootm $load_addr#$board\0"     \
 224         "nor_bootcmd=echo Trying load from nor..;"      \
 225                 "cp.b $kernel_addr $load_addr " \
 226                 "$kernel_size; env exists secureboot "  \
 227                 "&& cp.b $kernelheader_addr $kernelheader_addr_r "      \
 228                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 229                 "bootm $load_addr#$board\0"         \
 230         "nand_bootcmd=echo Trying load from NAND..;"    \
 231                 "nand info; nand read $load_addr "      \
 232                 "$kernel_start $kernel_size; env exists secureboot "    \
 233                 "&& nand read $kernelheader_addr_r $kernelheader_start "        \
 234                 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 235                 "bootm $load_addr#$board\0"     \
 236         "sd_bootcmd=echo Trying load from SD ..;"       \
 237                 "mmcinfo; mmc read $load_addr "         \
 238                 "$kernel_addr_sd $kernel_size_sd && "     \
 239                 "env exists secureboot && mmc read $kernelheader_addr_r "               \
 240                 "$kernelhdr_addr_sd $kernelhdr_size_sd "                \
 241                 " && esbc_validate ${kernelheader_addr_r};"     \
 242                 "bootm $load_addr#$board\0"
 243
 244
 245 #ifdef CONFIG_TFABOOT
 246 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "   \
 247                            "env exists secureboot && esbc_halt;"
 248 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
 249                            "env exists secureboot && esbc_halt;"
 250 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "     \
 251                            "env exists secureboot && esbc_halt;"
 252 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; "   \
 253                            "env exists secureboot && esbc_halt;"
 254 #endif
 255 #endif
 256
 257 /* Monitor Command Prompt */
 258 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 259
 260 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 261
 262 #include <asm/arch/soc.h>
 263
 264 #endif /* __LS1043A_COMMON_H */