1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor
4 * Copyright 2019-2021 NXP
7 #ifndef __LS1043A_COMMON_H
8 #define __LS1043A_COMMON_H
11 #ifdef CONFIG_SPL_BUILD
22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
29 #include <asm/arch/stream_id_lsch2.h>
30 #include <asm/arch/config.h>
32 /* Link Definitions */
34 #define CFG_SYS_DDR_SDRAM_BASE 0x80000000
35 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
36 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
37 #define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
39 #define CPU_RELEASE_ADDR secondary_boot_addr
42 #define CFG_SYS_NS16550_CLK (get_serial_clock())
45 #ifdef CONFIG_NAND_BOOT
46 #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
47 #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
54 #if defined(CONFIG_TFABOOT) || \
55 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
57 * CFG_SYS_FLASH_BASE has the final address (core view)
58 * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
59 * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
60 * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
62 #define CFG_SYS_FLASH_BASE 0x60000000
63 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE
64 #define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
74 #ifdef CONFIG_SYS_DPAA_FMAN
75 #define CFG_SYS_FM_MURAM_SIZE 0x60000
79 /* Miscellaneous configurable options */
81 #define HWCONFIG_BUFFER_SIZE 128
84 #define BOOT_TARGET_DEVICES(func) \
88 #include <config_distro_bootcmd.h>
90 /* Initial environment variables */
91 #define CFG_EXTRA_ENV_SETTINGS \
92 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
93 "fdt_high=0xffffffffffffffff\0" \
94 "initrd_high=0xffffffffffffffff\0" \
95 "kernel_addr=0x61000000\0" \
96 "scriptaddr=0x80000000\0" \
97 "scripthdraddr=0x80080000\0" \
98 "fdtheader_addr_r=0x80100000\0" \
99 "kernelheader_addr_r=0x80200000\0" \
100 "kernel_addr_r=0x81000000\0" \
101 "kernel_start=0x1000000\0" \
102 "kernelheader_start=0x800000\0" \
103 "fdt_addr_r=0x90000000\0" \
104 "load_addr=0xa0000000\0" \
105 "kernelheader_addr=0x60600000\0" \
106 "kernel_size=0x2800000\0" \
107 "kernelheader_size=0x40000\0" \
108 "kernel_addr_sd=0x8000\0" \
109 "kernel_size_sd=0x14000\0" \
110 "kernelhdr_addr_sd=0x3000\0" \
111 "kernelhdr_size_sd=0x10\0" \
112 "console=ttyS0,115200\0" \
115 "boot_scripts=ls1043ardb_boot.scr\0" \
116 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
117 "scan_dev_for_boot_part=" \
118 "part list ${devtype} ${devnum} devplist; " \
119 "env exists devplist || setenv devplist 1; " \
120 "for distro_bootpart in ${devplist}; do " \
121 "if fstype ${devtype} " \
122 "${devnum}:${distro_bootpart} " \
123 "bootfstype; then " \
124 "run scan_dev_for_boot; " \
128 "load ${devtype} ${devnum}:${distro_bootpart} " \
129 "${scriptaddr} ${prefix}${script}; " \
130 "env exists secureboot && load ${devtype} " \
131 "${devnum}:${distro_bootpart} " \
132 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
133 "env exists secureboot " \
134 "&& esbc_validate ${scripthdraddr};" \
135 "source ${scriptaddr}\0" \
136 "qspi_bootcmd=echo Trying load from qspi..;" \
137 "sf probe && sf read $load_addr " \
138 "$kernel_start $kernel_size; env exists secureboot " \
139 "&& sf read $kernelheader_addr_r $kernelheader_start " \
140 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
141 "bootm $load_addr#$board\0" \
142 "nor_bootcmd=echo Trying load from nor..;" \
143 "cp.b $kernel_addr $load_addr " \
144 "$kernel_size; env exists secureboot " \
145 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
146 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
147 "bootm $load_addr#$board\0" \
148 "nand_bootcmd=echo Trying load from NAND..;" \
149 "nand info; nand read $load_addr " \
150 "$kernel_start $kernel_size; env exists secureboot " \
151 "&& nand read $kernelheader_addr_r $kernelheader_start " \
152 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
153 "bootm $load_addr#$board\0" \
154 "sd_bootcmd=echo Trying load from SD ..;" \
155 "mmcinfo; mmc read $load_addr " \
156 "$kernel_addr_sd $kernel_size_sd && " \
157 "env exists secureboot && mmc read $kernelheader_addr_r " \
158 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
159 " && esbc_validate ${kernelheader_addr_r};" \
160 "bootm $load_addr#$board\0"
163 #ifdef CONFIG_TFABOOT
164 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
165 "env exists secureboot && esbc_halt;"
166 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
167 "env exists secureboot && esbc_halt;"
168 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
169 "env exists secureboot && esbc_halt;"
170 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
171 "env exists secureboot && esbc_halt;"
175 #include <asm/arch/soc.h>
177 #endif /* __LS1043A_COMMON_H */