1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor
4 * Copyright 2019-2021 NXP
7 #ifndef __LS1043A_COMMON_H
8 #define __LS1043A_COMMON_H
11 #ifdef CONFIG_SPL_BUILD
22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
29 #include <asm/arch/stream_id_lsch2.h>
30 #include <asm/arch/config.h>
32 /* Link Definitions */
34 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
39 #define CONFIG_VERY_BIG_RAM
40 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
41 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
42 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
43 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
45 #define CPU_RELEASE_ADDR secondary_boot_addr
48 #define CONFIG_SYS_NS16550_SERIAL
49 #define CONFIG_SYS_NS16550_REG_SIZE 1
50 #define CONFIG_SYS_NS16550_CLK (get_serial_clock())
55 #define CONFIG_SPL_MAX_SIZE 0x17000
56 #define CONFIG_SPL_STACK 0x1001e000
57 #define CONFIG_SPL_PAD_TO 0x1d000
59 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
60 CONFIG_SPL_BSS_MAX_SIZE)
61 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
62 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000
63 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
65 #ifdef CONFIG_NXP_ESBC
66 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
68 * HDR would be appended at end of image and copied to DDR along
69 * with U-Boot image. Here u-boot max. size is 512K. So if binary
70 * size increases then increase this size in case of secure boot as
71 * it uses raw u-boot image instead of fit image.
73 #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
75 #define CONFIG_SYS_MONITOR_LEN 0x100000
76 #endif /* ifdef CONFIG_NXP_ESBC */
80 #ifdef CONFIG_NAND_BOOT
81 #define CONFIG_SPL_PBL_PAD
82 #define CONFIG_SPL_MAX_SIZE 0x1a000
83 #define CONFIG_SPL_STACK 0x1001d000
84 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
85 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
86 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000
87 #define CONFIG_SPL_BSS_START_ADDR 0x80100000
88 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
89 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
91 #ifdef CONFIG_NXP_ESBC
92 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
93 #endif /* ifdef CONFIG_NXP_ESBC */
95 #ifdef CONFIG_U_BOOT_HDR_SIZE
97 * HDR would be appended at end of image and copied to DDR along
98 * with U-Boot image. Here u-boot max. size is 512K. So if binary
99 * size increases then increase this size in case of secure boot as
100 * it uses raw u-boot image instead of fit image.
102 #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
104 #define CONFIG_SYS_MONITOR_LEN 0x100000
105 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
113 #if defined(CONFIG_TFABOOT) || \
114 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
116 * CONFIG_SYS_FLASH_BASE has the final address (core view)
117 * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
118 * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
119 * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
121 #define CONFIG_SYS_FLASH_BASE 0x60000000
122 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
123 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
125 #ifdef CONFIG_MTD_NOR_FLASH
126 #define CONFIG_SYS_FLASH_QUIET_TEST
127 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
136 #define CONFIG_PCIE1 /* PCIE controller 1 */
137 #define CONFIG_PCIE2 /* PCIE controller 2 */
138 #define CONFIG_PCIE3 /* PCIE controller 3 */
141 #define CONFIG_PCI_SCAN_SHOW
149 #define CONFIG_SYS_DPAA_FMAN
150 #ifdef CONFIG_SYS_DPAA_FMAN
151 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000
153 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
157 /* Miscellaneous configurable options */
159 #define CONFIG_HWCONFIG
160 #define HWCONFIG_BUFFER_SIZE 128
163 #ifndef CONFIG_SPL_BUILD
164 #define BOOT_TARGET_DEVICES(func) \
168 #include <config_distro_bootcmd.h>
171 /* Initial environment variables */
172 #define CONFIG_EXTRA_ENV_SETTINGS \
173 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
174 "fdt_high=0xffffffffffffffff\0" \
175 "initrd_high=0xffffffffffffffff\0" \
176 "kernel_addr=0x61000000\0" \
177 "scriptaddr=0x80000000\0" \
178 "scripthdraddr=0x80080000\0" \
179 "fdtheader_addr_r=0x80100000\0" \
180 "kernelheader_addr_r=0x80200000\0" \
181 "kernel_addr_r=0x81000000\0" \
182 "kernel_start=0x1000000\0" \
183 "kernelheader_start=0x800000\0" \
184 "fdt_addr_r=0x90000000\0" \
185 "load_addr=0xa0000000\0" \
186 "kernelheader_addr=0x60600000\0" \
187 "kernel_size=0x2800000\0" \
188 "kernelheader_size=0x40000\0" \
189 "kernel_addr_sd=0x8000\0" \
190 "kernel_size_sd=0x14000\0" \
191 "kernelhdr_addr_sd=0x3000\0" \
192 "kernelhdr_size_sd=0x10\0" \
193 "console=ttyS0,115200\0" \
195 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
197 "boot_scripts=ls1043ardb_boot.scr\0" \
198 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
199 "scan_dev_for_boot_part=" \
200 "part list ${devtype} ${devnum} devplist; " \
201 "env exists devplist || setenv devplist 1; " \
202 "for distro_bootpart in ${devplist}; do " \
203 "if fstype ${devtype} " \
204 "${devnum}:${distro_bootpart} " \
205 "bootfstype; then " \
206 "run scan_dev_for_boot; " \
210 "load ${devtype} ${devnum}:${distro_bootpart} " \
211 "${scriptaddr} ${prefix}${script}; " \
212 "env exists secureboot && load ${devtype} " \
213 "${devnum}:${distro_bootpart} " \
214 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
215 "env exists secureboot " \
216 "&& esbc_validate ${scripthdraddr};" \
217 "source ${scriptaddr}\0" \
218 "qspi_bootcmd=echo Trying load from qspi..;" \
219 "sf probe && sf read $load_addr " \
220 "$kernel_start $kernel_size; env exists secureboot " \
221 "&& sf read $kernelheader_addr_r $kernelheader_start " \
222 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
223 "bootm $load_addr#$board\0" \
224 "nor_bootcmd=echo Trying load from nor..;" \
225 "cp.b $kernel_addr $load_addr " \
226 "$kernel_size; env exists secureboot " \
227 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
228 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
229 "bootm $load_addr#$board\0" \
230 "nand_bootcmd=echo Trying load from NAND..;" \
231 "nand info; nand read $load_addr " \
232 "$kernel_start $kernel_size; env exists secureboot " \
233 "&& nand read $kernelheader_addr_r $kernelheader_start " \
234 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
235 "bootm $load_addr#$board\0" \
236 "sd_bootcmd=echo Trying load from SD ..;" \
237 "mmcinfo; mmc read $load_addr " \
238 "$kernel_addr_sd $kernel_size_sd && " \
239 "env exists secureboot && mmc read $kernelheader_addr_r " \
240 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
241 " && esbc_validate ${kernelheader_addr_r};" \
242 "bootm $load_addr#$board\0"
245 #ifdef CONFIG_TFABOOT
246 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
247 "env exists secureboot && esbc_halt;"
248 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
249 "env exists secureboot && esbc_halt;"
250 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
251 "env exists secureboot && esbc_halt;"
252 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
253 "env exists secureboot && esbc_halt;"
257 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
259 #include <asm/arch/soc.h>
261 #endif /* __LS1043A_COMMON_H */