1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor
4 * Copyright 2019-2021 NXP
7 #ifndef __LS1043A_COMMON_H
8 #define __LS1043A_COMMON_H
11 #ifdef CONFIG_SPL_BUILD
22 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
25 #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
29 #define CONFIG_REMAKE_ELF
31 #include <asm/arch/stream_id_lsch2.h>
32 #include <asm/arch/config.h>
34 /* Link Definitions */
36 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
38 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
41 #define CONFIG_VERY_BIG_RAM
42 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
43 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
44 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
45 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
47 #define CPU_RELEASE_ADDR secondary_boot_addr
49 /* Generic Timer Definitions */
50 #define COUNTER_FREQUENCY 25000000 /* 25MHz */
53 #define CONFIG_SYS_NS16550_SERIAL
54 #define CONFIG_SYS_NS16550_REG_SIZE 1
55 #define CONFIG_SYS_NS16550_CLK (get_serial_clock())
60 #define CONFIG_SPL_MAX_SIZE 0x17000
61 #define CONFIG_SPL_STACK 0x1001e000
62 #define CONFIG_SPL_PAD_TO 0x1d000
64 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
65 CONFIG_SPL_BSS_MAX_SIZE)
66 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
67 #define CONFIG_SPL_BSS_START_ADDR 0x8f000000
68 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
70 #ifdef CONFIG_NXP_ESBC
71 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
73 * HDR would be appended at end of image and copied to DDR along
74 * with U-Boot image. Here u-boot max. size is 512K. So if binary
75 * size increases then increase this size in case of secure boot as
76 * it uses raw u-boot image instead of fit image.
78 #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
80 #define CONFIG_SYS_MONITOR_LEN 0x100000
81 #endif /* ifdef CONFIG_NXP_ESBC */
85 #ifdef CONFIG_NAND_BOOT
86 #define CONFIG_SPL_PBL_PAD
87 #define CONFIG_SPL_MAX_SIZE 0x1a000
88 #define CONFIG_SPL_STACK 0x1001d000
89 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
90 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
91 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000
92 #define CONFIG_SPL_BSS_START_ADDR 0x80100000
93 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
94 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
96 #ifdef CONFIG_NXP_ESBC
97 #define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
98 #endif /* ifdef CONFIG_NXP_ESBC */
100 #ifdef CONFIG_U_BOOT_HDR_SIZE
102 * HDR would be appended at end of image and copied to DDR along
103 * with U-Boot image. Here u-boot max. size is 512K. So if binary
104 * size increases then increase this size in case of secure boot as
105 * it uses raw u-boot image instead of fit image.
107 #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
109 #define CONFIG_SYS_MONITOR_LEN 0x100000
110 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
118 #if defined(CONFIG_TFABOOT) || \
119 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
121 * CONFIG_SYS_FLASH_BASE has the final address (core view)
122 * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
123 * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
124 * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
126 #define CONFIG_SYS_FLASH_BASE 0x60000000
127 #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
128 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
130 #ifdef CONFIG_MTD_NOR_FLASH
131 #define CONFIG_SYS_FLASH_QUIET_TEST
132 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
141 #define CONFIG_PCIE1 /* PCIE controller 1 */
142 #define CONFIG_PCIE2 /* PCIE controller 2 */
143 #define CONFIG_PCIE3 /* PCIE controller 3 */
146 #define CONFIG_PCI_SCAN_SHOW
154 #define CONFIG_SYS_DPAA_FMAN
155 #ifdef CONFIG_SYS_DPAA_FMAN
156 #define CONFIG_SYS_FM_MURAM_SIZE 0x60000
158 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
162 /* Miscellaneous configurable options */
164 #define CONFIG_HWCONFIG
165 #define HWCONFIG_BUFFER_SIZE 128
168 #ifndef CONFIG_SPL_BUILD
169 #define BOOT_TARGET_DEVICES(func) \
173 #include <config_distro_bootcmd.h>
176 /* Initial environment variables */
177 #define CONFIG_EXTRA_ENV_SETTINGS \
178 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
179 "fdt_high=0xffffffffffffffff\0" \
180 "initrd_high=0xffffffffffffffff\0" \
181 "fdt_addr=0x64f00000\0" \
182 "kernel_addr=0x61000000\0" \
183 "scriptaddr=0x80000000\0" \
184 "scripthdraddr=0x80080000\0" \
185 "fdtheader_addr_r=0x80100000\0" \
186 "kernelheader_addr_r=0x80200000\0" \
187 "kernel_addr_r=0x81000000\0" \
188 "kernel_start=0x1000000\0" \
189 "kernelheader_start=0x800000\0" \
190 "fdt_addr_r=0x90000000\0" \
191 "load_addr=0xa0000000\0" \
192 "kernelheader_addr=0x60600000\0" \
193 "kernel_size=0x2800000\0" \
194 "kernelheader_size=0x40000\0" \
195 "kernel_addr_sd=0x8000\0" \
196 "kernel_size_sd=0x14000\0" \
197 "kernelhdr_addr_sd=0x3000\0" \
198 "kernelhdr_size_sd=0x10\0" \
199 "console=ttyS0,115200\0" \
201 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
203 "boot_scripts=ls1043ardb_boot.scr\0" \
204 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
205 "scan_dev_for_boot_part=" \
206 "part list ${devtype} ${devnum} devplist; " \
207 "env exists devplist || setenv devplist 1; " \
208 "for distro_bootpart in ${devplist}; do " \
209 "if fstype ${devtype} " \
210 "${devnum}:${distro_bootpart} " \
211 "bootfstype; then " \
212 "run scan_dev_for_boot; " \
216 "load ${devtype} ${devnum}:${distro_bootpart} " \
217 "${scriptaddr} ${prefix}${script}; " \
218 "env exists secureboot && load ${devtype} " \
219 "${devnum}:${distro_bootpart} " \
220 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
221 "env exists secureboot " \
222 "&& esbc_validate ${scripthdraddr};" \
223 "source ${scriptaddr}\0" \
224 "qspi_bootcmd=echo Trying load from qspi..;" \
225 "sf probe && sf read $load_addr " \
226 "$kernel_start $kernel_size; env exists secureboot " \
227 "&& sf read $kernelheader_addr_r $kernelheader_start " \
228 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
229 "bootm $load_addr#$board\0" \
230 "nor_bootcmd=echo Trying load from nor..;" \
231 "cp.b $kernel_addr $load_addr " \
232 "$kernel_size; env exists secureboot " \
233 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
234 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
235 "bootm $load_addr#$board\0" \
236 "nand_bootcmd=echo Trying load from NAND..;" \
237 "nand info; nand read $load_addr " \
238 "$kernel_start $kernel_size; env exists secureboot " \
239 "&& nand read $kernelheader_addr_r $kernelheader_start " \
240 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
241 "bootm $load_addr#$board\0" \
242 "sd_bootcmd=echo Trying load from SD ..;" \
243 "mmcinfo; mmc read $load_addr " \
244 "$kernel_addr_sd $kernel_size_sd && " \
245 "env exists secureboot && mmc read $kernelheader_addr_r " \
246 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
247 " && esbc_validate ${kernelheader_addr_r};" \
248 "bootm $load_addr#$board\0"
251 #ifdef CONFIG_TFABOOT
252 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
253 "env exists secureboot && esbc_halt;"
254 #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
255 "env exists secureboot && esbc_halt;"
256 #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
257 "env exists secureboot && esbc_halt;"
258 #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
259 "env exists secureboot && esbc_halt;"
263 /* Monitor Command Prompt */
264 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
266 #define CONFIG_SYS_MAXARGS 64 /* max command args */
268 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
270 #include <asm/arch/soc.h>
272 #endif /* __LS1043A_COMMON_H */