1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2019-2020 NXP
6 #ifndef __LS1028A_QDS_H
7 #define __LS1028A_QDS_H
9 #include "ls1028a_common.h"
11 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
14 #define CONFIG_DIMM_SLOTS_PER_CTLR 2
16 #define CONFIG_QIXIS_I2C_ACCESS
21 #define CONFIG_FSL_QIXIS
23 #ifdef CONFIG_FSL_QIXIS
24 #define QIXIS_BASE 0x7fb00000
25 #define QIXIS_BASE_PHYS QIXIS_BASE
26 #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
27 #define QIXIS_LBMAP_SWITCH 1
28 #define QIXIS_LBMAP_MASK 0x0f
29 #define QIXIS_LBMAP_SHIFT 5
30 #define QIXIS_LBMAP_DFLTBANK 0x00
31 #define QIXIS_LBMAP_ALTBANK 0x00
32 #define QIXIS_LBMAP_SD 0x00
33 #define QIXIS_LBMAP_EMMC 0x00
34 #define QIXIS_LBMAP_QSPI 0x00
35 #define QIXIS_RCW_SRC_SD 0x8
36 #define QIXIS_RCW_SRC_EMMC 0x9
37 #define QIXIS_RCW_SRC_QSPI 0xf
38 #define QIXIS_RST_CTL_RESET 0x31
39 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
40 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
41 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
42 #define QIXIS_RST_FORCE_MEM 0x01
44 #define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
45 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
49 #define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
50 #define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
51 CSOR_NOR_NOR_MODE_AVD_NOR | \
56 #define CONFIG_SYS_RTC_BUS_NUM 1
57 #define I2C_MUX_CH_RTC 0xB
59 /* Store environment at top of flash */
63 #define CFG_LPUART_MUX_MASK 0xf0
64 #define CFG_LPUART_EN 0xf0
69 #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
71 #undef CONFIG_EXTRA_ENV_SETTINGS
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73 "board=ls1028aqds\0" \
74 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
75 "ramdisk_addr=0x800000\0" \
76 "ramdisk_size=0x2000000\0" \
77 "fdt_addr=0x00f00000\0" \
78 "kernel_addr=0x01000000\0" \
79 "scriptaddr=0x80000000\0" \
80 "scripthdraddr=0x80080000\0" \
81 "fdtheader_addr_r=0x80100000\0" \
82 "kernelheader_addr_r=0x80200000\0" \
83 "load_addr=0xa0000000\0" \
84 "kernel_addr_r=0x81000000\0" \
85 "fdt_addr_r=0x90000000\0" \
86 "fdt2_addr_r=0x90010000\0" \
87 "ramdisk_addr_r=0xa0000000\0" \
88 "kernel_start=0x1000000\0" \
89 "kernelheader_start=0x600000\0" \
90 "kernel_load=0xa0000000\0" \
91 "kernel_size=0x2800000\0" \
92 "kernelheader_size=0x40000\0" \
93 "kernel_addr_sd=0x8000\0" \
94 "kernel_size_sd=0x14000\0" \
95 "kernelhdr_addr_sd=0x3000\0" \
96 "kernelhdr_size_sd=0x10\0" \
97 "console=ttyS0,115200\0" \
98 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
100 "boot_scripts=ls1028aqds_boot.scr\0" \
101 "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
102 "scan_dev_for_boot_part=" \
103 "part list ${devtype} ${devnum} devplist; " \
104 "env exists devplist || setenv devplist 1; " \
105 "for distro_bootpart in ${devplist}; do " \
106 "if fstype ${devtype} " \
107 "${devnum}:${distro_bootpart} " \
108 "bootfstype; then " \
109 "run scan_dev_for_boot; " \
113 "load ${devtype} ${devnum}:${distro_bootpart} " \
114 "${scriptaddr} ${prefix}${script}; " \
115 "env exists secureboot && load ${devtype} " \
116 "${devnum}:${distro_bootpart} " \
117 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
118 "&& esbc_validate ${scripthdraddr};" \
119 "source ${scriptaddr}\0" \
120 "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
121 "sf probe 0:0 && sf read $load_addr " \
122 "$kernel_start $kernel_size ; env exists secureboot &&" \
123 "sf read $kernelheader_addr_r $kernelheader_start " \
124 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
125 " bootm $load_addr#$board\0" \
126 "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
127 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
128 "&& hdp load $load_addr 0x2000\0" \
129 "sd_bootcmd=echo Trying load from SD ...;" \
130 "mmc dev 0; mmcinfo; mmc read $load_addr " \
131 "$kernel_addr_sd $kernel_size_sd && " \
132 "env exists secureboot && mmc read $kernelheader_addr_r " \
133 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
134 " && esbc_validate ${kernelheader_addr_r};" \
135 "bootm $load_addr#$board\0" \
136 "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
137 "mmc dev 0;mmcinfo; mmc read $load_addr 0x4a00 0x200 " \
138 "&& hdp load $load_addr 0x2000\0" \
139 "emmc_bootcmd=echo Trying load from EMMC ..;" \
140 "mmc dev 1; mmcinfo; mmc read $load_addr " \
141 "$kernel_addr_sd $kernel_size_sd && " \
142 "env exists secureboot && mmc read $kernelheader_addr_r " \
143 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
144 " && esbc_validate ${kernelheader_addr_r};" \
145 "bootm $load_addr#$board\0" \
146 "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
147 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
148 "&& hdp load $load_addr 0x2000\0"
151 #endif /* __LS1028A_QDS_H */