1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2019-2020 NXP
6 #ifndef __LS1028A_QDS_H
7 #define __LS1028A_QDS_H
9 #include "ls1028a_common.h"
11 #define CONFIG_SYS_CLK_FREQ 100000000
12 #define CONFIG_DDR_CLK_FREQ 100000000
13 #define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
16 #define CONFIG_DIMM_SLOTS_PER_CTLR 2
18 #define CONFIG_QIXIS_I2C_ACCESS
23 #define CONFIG_FSL_QIXIS
25 #ifdef CONFIG_FSL_QIXIS
26 #define QIXIS_BASE 0x7fb00000
27 #define QIXIS_BASE_PHYS QIXIS_BASE
28 #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
29 #define QIXIS_LBMAP_SWITCH 1
30 #define QIXIS_LBMAP_MASK 0x0f
31 #define QIXIS_LBMAP_SHIFT 5
32 #define QIXIS_LBMAP_DFLTBANK 0x00
33 #define QIXIS_LBMAP_ALTBANK 0x00
34 #define QIXIS_LBMAP_SD 0x00
35 #define QIXIS_LBMAP_EMMC 0x00
36 #define QIXIS_LBMAP_QSPI 0x00
37 #define QIXIS_RCW_SRC_SD 0x8
38 #define QIXIS_RCW_SRC_EMMC 0x9
39 #define QIXIS_RCW_SRC_QSPI 0xf
40 #define QIXIS_RST_CTL_RESET 0x31
41 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
42 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
43 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
44 #define QIXIS_RST_FORCE_MEM 0x01
46 #define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
47 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
51 #define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
52 #define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
53 CSOR_NOR_NOR_MODE_AVD_NOR | \
58 #define CONFIG_SYS_RTC_BUS_NUM 1
59 #define I2C_MUX_CH_RTC 0xB
61 /* Store environment at top of flash */
63 #ifdef CONFIG_SPL_BUILD
64 #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
66 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
71 #define CONFIG_LPUART_32B_REG
72 #define CFG_LPUART_MUX_MASK 0xf0
73 #define CFG_LPUART_EN 0xf0
77 #define CONFIG_SCSI_AHCI_PLAT
79 #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
80 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
81 #define CONFIG_SYS_SCSI_MAX_LUN 1
82 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
83 CONFIG_SYS_SCSI_MAX_LUN)
85 #undef CONFIG_EXTRA_ENV_SETTINGS
86 #define CONFIG_EXTRA_ENV_SETTINGS \
87 "board=ls1028aqds\0" \
88 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
89 "ramdisk_addr=0x800000\0" \
90 "ramdisk_size=0x2000000\0" \
91 "fdt_addr=0x00f00000\0" \
92 "kernel_addr=0x01000000\0" \
93 "scriptaddr=0x80000000\0" \
94 "scripthdraddr=0x80080000\0" \
95 "fdtheader_addr_r=0x80100000\0" \
96 "kernelheader_addr_r=0x80200000\0" \
97 "load_addr=0xa0000000\0" \
98 "kernel_addr_r=0x81000000\0" \
99 "fdt_addr_r=0x90000000\0" \
100 "fdt2_addr_r=0x90010000\0" \
101 "ramdisk_addr_r=0xa0000000\0" \
102 "kernel_start=0x1000000\0" \
103 "kernelheader_start=0x600000\0" \
104 "kernel_load=0xa0000000\0" \
105 "kernel_size=0x2800000\0" \
106 "kernelheader_size=0x40000\0" \
107 "kernel_addr_sd=0x8000\0" \
108 "kernel_size_sd=0x14000\0" \
109 "kernelhdr_addr_sd=0x3000\0" \
110 "kernelhdr_size_sd=0x10\0" \
111 "console=ttyS0,115200\0" \
112 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
114 "boot_scripts=ls1028aqds_boot.scr\0" \
115 "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
116 "scan_dev_for_boot_part=" \
117 "part list ${devtype} ${devnum} devplist; " \
118 "env exists devplist || setenv devplist 1; " \
119 "for distro_bootpart in ${devplist}; do " \
120 "if fstype ${devtype} " \
121 "${devnum}:${distro_bootpart} " \
122 "bootfstype; then " \
123 "run scan_dev_for_boot; " \
127 "load ${devtype} ${devnum}:${distro_bootpart} " \
128 "${scriptaddr} ${prefix}${script}; " \
129 "env exists secureboot && load ${devtype} " \
130 "${devnum}:${distro_bootpart} " \
131 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
132 "&& esbc_validate ${scripthdraddr};" \
133 "source ${scriptaddr}\0" \
134 "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
135 "sf probe 0:0 && sf read $load_addr " \
136 "$kernel_start $kernel_size ; env exists secureboot &&" \
137 "sf read $kernelheader_addr_r $kernelheader_start " \
138 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
139 " bootm $load_addr#$board\0" \
140 "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
141 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
142 "&& hdp load $load_addr 0x2000\0" \
143 "sd_bootcmd=echo Trying load from SD ...;" \
144 "mmc dev 0; mmcinfo; mmc read $load_addr " \
145 "$kernel_addr_sd $kernel_size_sd && " \
146 "env exists secureboot && mmc read $kernelheader_addr_r " \
147 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
148 " && esbc_validate ${kernelheader_addr_r};" \
149 "bootm $load_addr#$board\0" \
150 "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
151 "mmc dev 0;mmcinfo; mmc read $load_addr 0x4a00 0x200 " \
152 "&& hdp load $load_addr 0x2000\0" \
153 "emmc_bootcmd=echo Trying load from EMMC ..;" \
154 "mmc dev 1; mmcinfo; mmc read $load_addr " \
155 "$kernel_addr_sd $kernel_size_sd && " \
156 "env exists secureboot && mmc read $kernelheader_addr_r " \
157 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
158 " && esbc_validate ${kernelheader_addr_r};" \
159 "bootm $load_addr#$board\0" \
160 "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
161 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
162 "&& hdp load $load_addr 0x2000\0"
165 #endif /* __LS1028A_QDS_H */