include/configs/ls1028aqds.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __LS1028A_QDS_H
   7 #define __LS1028A_QDS_H
   8
   9 #include "ls1028a_common.h"
  10
  11 #define CONFIG_SYS_CLK_FREQ             100000000
  12 #define CONFIG_DDR_CLK_FREQ             100000000
  13 #define COUNTER_FREQUENCY_REAL          (CONFIG_SYS_CLK_FREQ / 4)
  14
  15 /* DDR */
  16 #define CONFIG_DIMM_SLOTS_PER_CTLR              2
  17
  18 #define CONFIG_QIXIS_I2C_ACCESS
  19 #define CONFIG_SYS_I2C_EARLY_INIT
  20
  21 /*
  22  * QIXIS Definitions
  23  */
  24 #define CONFIG_FSL_QIXIS
  25
  26 #ifdef CONFIG_FSL_QIXIS
  27 #define QIXIS_BASE                      0x7fb00000
  28 #define QIXIS_BASE_PHYS                 QIXIS_BASE
  29 #define CONFIG_SYS_I2C_FPGA_ADDR        0x66
  30 #define QIXIS_LBMAP_SWITCH              1
  31 #define QIXIS_LBMAP_MASK                0x0f
  32 #define QIXIS_LBMAP_SHIFT               5
  33 #define QIXIS_LBMAP_DFLTBANK            0x00
  34 #define QIXIS_LBMAP_ALTBANK             0x00
  35 #define QIXIS_LBMAP_SD                  0x00
  36 #define QIXIS_LBMAP_EMMC                0x00
  37 #define QIXIS_LBMAP_QSPI                0x00
  38 #define QIXIS_RCW_SRC_SD                0x8
  39 #define QIXIS_RCW_SRC_EMMC              0x9
  40 #define QIXIS_RCW_SRC_QSPI              0xf
  41 #define QIXIS_RST_CTL_RESET             0x31
  42 #define QIXIS_RCFG_CTL_RECONFIG_IDLE    0x20
  43 #define QIXIS_RCFG_CTL_RECONFIG_START   0x21
  44 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE   0x08
  45 #define QIXIS_RST_FORCE_MEM             0x01
  46
  47 #define CONFIG_SYS_FPGA_CSPR_EXT        (0x0)
  48 #define CONFIG_SYS_FPGA_CSPR            (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
  49                                         CSPR_PORT_SIZE_8 | \
  50                                         CSPR_MSEL_GPCM | \
  51                                         CSPR_V)
  52 #define CONFIG_SYS_FPGA_AMASK           IFC_AMASK(64 * 1024)
  53 #define CONFIG_SYS_FPGA_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
  54                                         CSOR_NOR_NOR_MODE_AVD_NOR | \
  55                                         CSOR_NOR_TRHZ_80)
  56 #endif
  57
  58 /* RTC */
  59 #define CONFIG_SYS_RTC_BUS_NUM         1
  60 #define I2C_MUX_CH_RTC                 0xB
  61
  62 /* Store environment at top of flash */
  63 #define CONFIG_ENV_SIZE                 0x2000
  64
  65 #ifdef CONFIG_SPL_BUILD
  66 #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
  67 #else
  68 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  69 #endif
  70
  71 /* SATA */
  72 #define CONFIG_SCSI_AHCI_PLAT
  73
  74 #define CONFIG_SYS_SATA1                        AHCI_BASE_ADDR1
  75 #ifndef CONFIG_CMD_EXT2
  76 #define CONFIG_CMD_EXT2
  77 #endif
  78 #define CONFIG_SYS_SCSI_MAX_SCSI_ID             1
  79 #define CONFIG_SYS_SCSI_MAX_LUN                 1
  80 #define CONFIG_SYS_SCSI_MAX_DEVICE              (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  81                                                 CONFIG_SYS_SCSI_MAX_LUN)
  82 /* DSPI */
  83 #ifdef CONFIG_FSL_DSPI
  84 #define CONFIG_SPI_FLASH_SST
  85 #define CONFIG_SPI_FLASH_EON
  86 #endif
  87
  88 #ifndef SPL_NO_ENV
  89 #undef CONFIG_EXTRA_ENV_SETTINGS
  90 #define CONFIG_EXTRA_ENV_SETTINGS \
  91         "board=ls1028aqds\0" \
  92         "hwconfig=fsl_ddr:bank_intlv=auto\0" \
  93         "ramdisk_addr=0x800000\0" \
  94         "ramdisk_size=0x2000000\0" \
  95         "fdt_high=0xffffffffffffffff\0" \
  96         "initrd_high=0xffffffffffffffff\0" \
  97         "fdt_addr=0x00f00000\0" \
  98         "kernel_addr=0x01000000\0" \
  99         "scriptaddr=0x80000000\0" \
 100         "scripthdraddr=0x80080000\0" \
 101         "fdtheader_addr_r=0x80100000\0" \
 102         "kernelheader_addr_r=0x80200000\0" \
 103         "load_addr=0xa0000000\0" \
 104         "kernel_addr_r=0x81000000\0" \
 105         "fdt_addr_r=0x90000000\0" \
 106         "ramdisk_addr_r=0xa0000000\0" \
 107         "kernel_start=0x1000000\0" \
 108         "kernelheader_start=0x800000\0" \
 109         "kernel_load=0xa0000000\0" \
 110         "kernel_size=0x2800000\0" \
 111         "kernelheader_size=0x40000\0" \
 112         "kernel_addr_sd=0x8000\0" \
 113         "kernel_size_sd=0x14000\0" \
 114         "kernelhdr_addr_sd=0x4000\0" \
 115         "kernelhdr_size_sd=0x10\0" \
 116         "console=ttyS0,115200\0" \
 117         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
 118         BOOTENV \
 119         "boot_scripts=ls1028aqds_boot.scr\0" \
 120         "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
 121         "scan_dev_for_boot_part=" \
 122                 "part list ${devtype} ${devnum} devplist; " \
 123                 "env exists devplist || setenv devplist 1; " \
 124                 "for distro_bootpart in ${devplist}; do " \
 125                   "if fstype ${devtype} " \
 126                         "${devnum}:${distro_bootpart} " \
 127                         "bootfstype; then " \
 128                         "run scan_dev_for_boot; " \
 129                   "fi; " \
 130                 "done\0" \
 131         "scan_dev_for_boot=" \
 132                 "echo Scanning ${devtype} " \
 133                                 "${devnum}:${distro_bootpart}...; " \
 134                 "for prefix in ${boot_prefixes}; do " \
 135                         "run scan_dev_for_scripts; " \
 136                 "done;" \
 137                 "\0" \
 138         "boot_a_script=" \
 139                 "load ${devtype} ${devnum}:${distro_bootpart} " \
 140                         "${scriptaddr} ${prefix}${script}; " \
 141                 "env exists secureboot && load ${devtype} " \
 142                         "${devnum}:${distro_bootpart} " \
 143                         "${scripthdraddr} ${prefix}${boot_script_hdr} " \
 144                         "&& esbc_validate ${scripthdraddr};" \
 145                 "source ${scriptaddr}\0" \
 146         "sd_bootcmd=echo Trying load from SD ..;" \
 147                 "mmcinfo; mmc read $load_addr " \
 148                 "$kernel_addr_sd $kernel_size_sd && " \
 149                 "env exists secureboot && mmc read $kernelheader_addr_r " \
 150                 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
 151                 " && esbc_validate ${kernelheader_addr_r};" \
 152                 "bootm $load_addr#$board\0" \
 153         "emmc_bootcmd=echo Trying load from EMMC ..;" \
 154                 "mmcinfo; mmc dev 1; mmc read $load_addr " \
 155                 "$kernel_addr_sd $kernel_size_sd && " \
 156                 "env exists secureboot && mmc read $kernelheader_addr_r " \
 157                 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
 158                 " && esbc_validate ${kernelheader_addr_r};"     \
 159                 "bootm $load_addr#$board\0"
 160 #endif
 161 #endif /* __LS1028A_QDS_H */