1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __L1028A_COMMON_H
7 #define __L1028A_COMMON_H
9 #define CONFIG_REMAKE_ELF
10 #define CONFIG_FSL_LAYERSCAPE
13 #include <asm/arch/stream_id_lsch3.h>
14 #include <asm/arch/config.h>
15 #include <asm/arch/soc.h>
17 /* Link Definitions */
18 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
20 #define CONFIG_SKIP_LOWLEVEL_INIT
22 #define CONFIG_VERY_BIG_RAM
23 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
24 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
25 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
26 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
27 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
29 #define CONFIG_CMD_MEMTEST
30 #define CONFIG_SYS_MEMTEST_START 0x80000000
31 #define CONFIG_SYS_MEMTEST_END 0x9fffffff
36 #define CPU_RELEASE_ADDR secondary_boot_func
38 /* Generic Timer Definitions */
39 #define COUNTER_FREQUENCY 25000000 /* 25MHz */
41 /* Size of malloc() pool */
42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
46 #define CONFIG_SYS_I2C
50 #define CONFIG_CONS_INDEX 1
51 #define CONFIG_SYS_NS16550_SERIAL
52 #define CONFIG_SYS_NS16550_REG_SIZE 1
53 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
55 #define CONFIG_BAUDRATE 115200
56 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
58 /* Miscellaneous configurable options */
59 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
61 /* Physical Memory Map */
62 #define CONFIG_CHIP_SELECTS_PER_CTRL 4
64 #define CONFIG_HWCONFIG
65 #define HWCONFIG_BUFFER_SIZE 128
67 /* Allow to overwrite serial and ethaddr */
68 #define CONFIG_ENV_OVERWRITE
70 #define BOOT_TARGET_DEVICES(func) \
73 #include <config_distro_bootcmd.h>
75 /* Initial environment variables */
76 #define CONFIG_EXTRA_ENV_SETTINGS \
77 "board=ls1028ardb\0" \
78 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
79 "ramdisk_addr=0x800000\0" \
80 "ramdisk_size=0x2000000\0" \
81 "fdt_high=0xffffffffffffffff\0" \
82 "initrd_high=0xffffffffffffffff\0" \
83 "fdt_addr=0x00f00000\0" \
84 "kernel_addr=0x01000000\0" \
85 "scriptaddr=0x80000000\0" \
86 "scripthdraddr=0x80080000\0" \
87 "fdtheader_addr_r=0x80100000\0" \
88 "kernelheader_addr_r=0x80200000\0" \
89 "load_addr=0xa0000000\0" \
90 "kernel_addr_r=0x81000000\0" \
91 "fdt_addr_r=0x90000000\0" \
92 "ramdisk_addr_r=0xa0000000\0" \
93 "kernel_start=0x1000000\0" \
94 "kernelheader_start=0x800000\0" \
95 "kernel_load=0xa0000000\0" \
96 "kernel_size=0x2800000\0" \
97 "kernelheader_size=0x40000\0" \
98 "kernel_addr_sd=0x8000\0" \
99 "kernel_size_sd=0x14000\0" \
100 "kernelhdr_addr_sd=0x4000\0" \
101 "kernelhdr_size_sd=0x10\0" \
102 "console=ttyS0,115200\0" \
103 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
105 "boot_scripts=ls1028ardb_boot.scr\0" \
106 "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
107 "scan_dev_for_boot_part=" \
108 "part list ${devtype} ${devnum} devplist; " \
109 "env exists devplist || setenv devplist 1; " \
110 "for distro_bootpart in ${devplist}; do " \
111 "if fstype ${devtype} " \
112 "${devnum}:${distro_bootpart} " \
113 "bootfstype; then " \
114 "run scan_dev_for_boot; " \
117 "scan_dev_for_boot=" \
118 "echo Scanning ${devtype} " \
119 "${devnum}:${distro_bootpart}...; " \
120 "for prefix in ${boot_prefixes}; do " \
121 "run scan_dev_for_scripts; " \
125 "load ${devtype} ${devnum}:${distro_bootpart} " \
126 "${scriptaddr} ${prefix}${script}; " \
127 "env exists secureboot && load ${devtype} " \
128 "${devnum}:${distro_bootpart} " \
129 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
130 "&& esbc_validate ${scripthdraddr};" \
131 "source ${scriptaddr}\0" \
132 "sd_bootcmd=echo Trying load from SD ..;" \
133 "mmcinfo; mmc read $load_addr " \
134 "$kernel_addr_sd $kernel_size_sd && " \
135 "env exists secureboot && mmc read $kernelheader_addr_r " \
136 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
137 " && esbc_validate ${kernelheader_addr_r};" \
138 "bootm $load_addr#$board\0" \
139 "emmc_bootcmd=echo Trying load from EMMC ..;" \
140 "mmcinfo; mmc dev 1; mmc read $load_addr " \
141 "$kernel_addr_sd $kernel_size_sd && " \
142 "env exists secureboot && mmc read $kernelheader_addr_r " \
143 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
144 " && esbc_validate ${kernelheader_addr_r};" \
145 "bootm $load_addr#$board\0"
147 #undef CONFIG_BOOTCOMMAND
149 #define SD_BOOTCOMMAND \
150 "run distro_bootcmd;run sd_bootcmd; " \
151 "env exists secureboot && esbc_halt;"
153 /* Monitor Command Prompt */
154 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
155 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
156 sizeof(CONFIG_SYS_PROMPT) + 16)
157 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
159 #ifndef CONFIG_CMDLINE_EDITING
160 #define CONFIG_CMDLINE_EDITING 1
163 #define CONFIG_SYS_MAXARGS 64 /* max command args */
165 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
169 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
172 #define CONFIG_SYS_MMC_ENV_DEV 0
173 #define OCRAM_NONSECURE_SIZE 0x00010000
174 #define CONFIG_ENV_OFFSET 0x500000 /* 5MB */
175 #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
176 #define CONFIG_ENV_ADDR CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET
177 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */
178 #define CONFIG_ENV_SECT_SIZE 0x40000
180 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
182 /* I2C bus multiplexer */
183 #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
184 #define I2C_MUX_CH_DEFAULT 0x8
187 #define CONFIG_ID_EEPROM
188 #define CONFIG_SYS_I2C_EEPROM_NXID
189 #define CONFIG_SYS_EEPROM_BUS_NUM 0
190 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
191 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
192 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
193 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
195 #ifdef CONFIG_SECURE_BOOT
196 #include <asm/fsl_secure_boot.h>
200 /* smallest ENETC BD ring has 8 entries */
201 #define CONFIG_SYS_RX_ETH_BUFFER 8
203 #endif /* __L1028A_COMMON_H */