2 * Copyright 2016 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __LS1012ARDB_H__
8 #define __LS1012ARDB_H__
10 #include "ls1012a_common.h"
13 #define CONFIG_DIMM_SLOTS_PER_CTLR 1
14 #define CONFIG_CHIP_SELECTS_PER_CTRL 1
15 #define CONFIG_NR_DRAM_BANKS 2
16 #define CONFIG_SYS_SDRAM_SIZE 0x40000000
17 #define CONFIG_CMD_MEMINFO
18 #define CONFIG_CMD_MEMTEST
19 #define CONFIG_SYS_MEMTEST_START 0x80000000
20 #define CONFIG_SYS_MEMTEST_END 0x9fffffff
27 #define I2C_MUX_IO1_ADDR 0x24
28 #define __SW_BOOT_MASK 0xFC
29 #define __SW_BOOT_EMU 0x10
30 #define __SW_BOOT_BANK1 0x00
31 #define __SW_BOOT_BANK2 0x01
32 #define __SW_REV_MASK 0x07
33 #define __SW_REV_A 0xF8
34 #define __SW_REV_B 0xF0
38 #define CONFIG_FSL_ESDHC
39 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
44 #define CONFIG_SCSI_AHCI
45 #define CONFIG_SCSI_AHCI_PLAT
47 #define CONFIG_SYS_SATA AHCI_BASE_ADDR
49 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
50 #define CONFIG_SYS_SCSI_MAX_LUN 1
51 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
52 CONFIG_SYS_SCSI_MAX_LUN)
54 #define CONFIG_PCIE1 /* PCIE controller 1 */
56 #define CONFIG_PCI_SCAN_SHOW
58 #define CONFIG_CMD_MEMINFO
59 #define CONFIG_CMD_MEMTEST
60 #define CONFIG_SYS_MEMTEST_START 0x80000000
61 #define CONFIG_SYS_MEMTEST_END 0x9fffffff
64 #include <asm/fsl_secure_boot.h>
66 #endif /* __LS1012ARDB_H__ */