1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016 Freescale Semiconductor
6 #ifndef __LS1012A_COMMON_H
7 #define __LS1012A_COMMON_H
9 #define CONFIG_FSL_LAYERSCAPE
12 #include <asm/arch/config.h>
13 #include <asm/arch/stream_id_lsch2.h>
15 #define CONFIG_SYS_CLK_FREQ 125000000
17 #define CONFIG_SKIP_LOWLEVEL_INIT
20 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
22 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
24 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
26 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
27 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
28 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
29 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
31 /* Generic Timer Definitions */
32 #define COUNTER_FREQUENCY 25000000 /* 25MHz */
35 #define CONFIG_LAYERSCAPE_NS_ACCESS
37 /* Size of malloc() pool */
38 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
41 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT)
42 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
43 #define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
44 #define CONFIG_ENV_SPI_BUS 0
45 #define CONFIG_ENV_SPI_CS 0
46 #define CONFIG_ENV_SPI_MAX_HZ 1000000
47 #define CONFIG_ENV_SPI_MODE 0x03
48 #define CONFIG_SPI_FLASH_SPANSION
49 #define CONFIG_FSL_SPI_INTERFACE
50 #define CONFIG_SF_DATAFLASH
52 #define CONFIG_FSL_QSPI
53 #define QSPI0_AMBA_BASE 0x40000000
54 #define CONFIG_SPI_FLASH_SPANSION
56 #define FSL_QSPI_FLASH_SIZE SZ_64M
57 #define FSL_QSPI_FLASH_NUM 2
62 #define CONFIG_ENV_OVERWRITE
64 #define CONFIG_ENV_SIZE 0x40000 /* 256KB */
66 #define CONFIG_ENV_OFFSET 0x500000 /* 5MB */
68 #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
70 #define CONFIG_ENV_SECT_SIZE 0x40000
74 #define CONFIG_SCSI_AHCI_PLAT
76 #define CONFIG_SYS_SATA AHCI_BASE_ADDR
78 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
79 #define CONFIG_SYS_SCSI_MAX_LUN 1
80 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
81 CONFIG_SYS_SCSI_MAX_LUN)
84 #define CONFIG_SYS_I2C
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE 1
88 #define CONFIG_SYS_NS16550_CLK (get_serial_clock())
90 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
92 #define CONFIG_SYS_HZ 1000
94 #define CONFIG_HWCONFIG
95 #define HWCONFIG_BUFFER_SIZE 128
97 #ifndef CONFIG_SPL_BUILD
98 #define BOOT_TARGET_DEVICES(func) \
102 #include <config_distro_bootcmd.h>
105 /* Initial environment variables */
106 #define CONFIG_EXTRA_ENV_SETTINGS \
108 "loadaddr=0x80100000\0" \
109 "kernel_addr=0x100000\0" \
110 "fdt_high=0xffffffffffffffff\0" \
111 "initrd_high=0xffffffffffffffff\0" \
112 "kernel_start=0x1000000\0" \
113 "kernel_load=0xa0000000\0" \
114 "kernel_size=0x2800000\0" \
116 #undef CONFIG_BOOTCOMMAND
117 #ifdef CONFIG_TFABOOT
118 #define QSPI_NOR_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
119 "$kernel_start $kernel_size && "\
122 #define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
123 "$kernel_start $kernel_size && "\
127 /* Monitor Command Prompt */
128 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
129 #define CONFIG_SYS_MAXARGS 64 /* max command args */
131 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
133 #include <asm/arch/soc.h>
135 #endif /* __LS1012A_COMMON_H */