2 * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * Valid values for CONFIG_SYS_TEXT_BASE are:
26 * Standard configuration - all models
27 * 0xFFF00000 boot from flash
29 * Test configuration (boot from RAM using uloader.o)
30 * LinkStation HD-HLAN and KuroBox Standard
31 * 0x03F00000 boot from RAM
32 * LinkStation HD-HGLAN and KuroBox HG
33 * 0x07F00000 boot from RAM
35 #ifndef CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_TEXT_BASE 0xFFF00000
43 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
45 /*-----------------------------------------------------------------------
46 * User configurable settings:
48 * CONFIG_IPADDR_LS - the IP address of the LinkStation
49 * CONFIG_SERVERIP_LS - the address of the server for NFS/TFTP/DHCP/BOOTP
51 * CONFIG_NCIP_LS - the adress of the computer running net console
52 * if not configured, it will be set to
57 #define CONFIG_IPADDR_LS 192.168.11.150
58 #define CONFIG_SERVERIP_LS 192.168.11.149
60 #if !defined(CONFIG_IPADDR_LS) || !defined(CONFIG_SERVERIP_LS)
61 #error Both CONFIG_IPADDR_LS and CONFIG_SERVERIP_LS must be defined
64 #if !defined(CONFIG_NCIP_LS)
65 #define CONFIG_NCIP_LS CONFIG_SERVERIP_LS
68 /*----------------------------------------------------------------------
69 * DO NOT CHANGE ANYTHING BELOW, UNLESS YOU KNOW WHAT YOU ARE DOING
70 *---------------------------------------------------------------------*/
72 #define CONFIG_MPC8245 1
73 #define CONFIG_LINKSTATION 1
75 /*---------------------------------------
78 * LinkStation HDLAN /KuroBox Standard (CONFIG_HLAN)
79 * LinkStation old model (CONFIG_LAN) - totally untested
80 * LinkStation HGLAN / KuroBox HG (CONFIG_HGLAN)
82 * Models not supported yet
83 * TeraStatin (CONFIG_HTGL)
86 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
87 #define CONFIG_IDENT_STRING " LinkStation / KuroBox"
88 #elif defined(CONFIG_HGLAN)
89 #define CONFIG_IDENT_STRING " LinkStation HG / KuroBox HG"
90 #elif defined(CONFIG_HTGL)
91 #define CONFIG_IDENT_STRING " TeraStation"
93 #error No LinkStation model defined
96 #define CONFIG_BOOTDELAY 5
97 #define CONFIG_ZERO_BOOTDELAY_CHECK
98 #undef CONFIG_BOOT_RETRY_TIME
100 #define CONFIG_AUTOBOOT_KEYED
101 #define CONFIG_AUTOBOOT_PROMPT \
102 "Boot in %02d seconds ('s' to stop)...", bootdelay
103 #define CONFIG_AUTOBOOT_STOP_STR "s"
105 #define CONFIG_CMD_IDE
106 #define CONFIG_CMD_PCI
107 #define CONFIG_CMD_DHCP
108 #define CONFIG_CMD_PING
109 #define CONFIG_CMD_EXT2
111 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_ALL
113 #define CONFIG_OF_LIBFDT 1
115 #define OF_STDOUT_PATH "/soc10x/serial@80004600"
117 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
118 #include <config_cmd_default.h>
121 * Miscellaneous configurable options
123 #define CONFIG_SYS_LONGHELP /* undef to save memory */
124 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
125 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
127 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
128 #define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
129 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
130 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Default load address: 8 MB */
132 #define CONFIG_BOOTCOMMAND "run bootcmd1"
133 #define CONFIG_BOOTARGS "root=/dev/sda1 console=ttyS1,57600 netconsole=@192.168.1.7/eth0,@192.168.1.1/00:50:BF:A4:59:71 rtc-rs5c372.probe=0,0x32 debug"
134 #define CONFIG_NFSBOOTCOMMAND "bootp;run nfsargs;bootm"
136 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
138 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
139 #define UBFILE "share/u-boot/u-boot-hd.flash.bin"
140 #elif defined(CONFIG_HGLAN)
141 #define UBFILE "share/u-boot/u-boot-hg.flash.bin"
142 #elif defined(CONFIG_HTGL)
143 #define UBFILE "share/u-boot/u-boot-ht.flash.bin"
145 #error No LinkStation model defined
148 #define CONFIG_EXTRA_ENV_SETTINGS \
153 "ipaddr="__stringify(CONFIG_IPADDR_LS)"\0" \
154 "netmask=255.255.255.0\0" \
155 "serverip="__stringify(CONFIG_SERVERIP_LS)"\0" \
156 "ncip="__stringify(CONFIG_NCIP_LS)"\0" \
158 "nc=setenv stdin nc;setenv stdout nc;setenv stderr nc\0" \
159 "ser=setenv stdin serial;setenv stdout serial;setenv stderr serial\0" \
162 "hdfile=boot/uImage\0" \
163 "hdload=echo Loading ${hdpart}:${hdfile};ext2load ide ${hdpart} ${ldaddr} ${hdfile};ext2load ide ${hdpart} 7f0000 boot/kuroboxHG.dtb\0" \
164 "boothd=setenv bootargs " CONFIG_BOOTARGS ";bootm ${ldaddr} - 7f0000\0" \
165 "hdboot=run hdload;run boothd\0" \
166 "flboot=setenv bootargs root=/dev/hda1;bootm ffc00000\0" \
167 "emboot=setenv bootargs root=/dev/ram0;bootm ffc00000\0" \
168 "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
169 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
171 "bootcmd1=run hdboot;run flboot\0" \
172 "bootcmd2=run flboot\0" \
173 "bootcmd3=run emboot\0" \
174 "writeng=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4e474e47 1;cp.b 800000 fff70000 4\0" \
175 "writeok=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4f4b4f4b 1;cp.b 800000 fff70000 4\0" \
177 "ubfile="UBFILE"\0" \
178 "ubload=echo Loading ${ubpart}:${ubfile};ext2load ide ${ubpart} ${ldaddr} ${ubfile}\0" \
179 "ubsaddr=fff00000\0" \
180 "ubeaddr=fff2ffff\0" \
181 "ubflash=protect off ${ubsaddr} ${ubeaddr};era ${ubsaddr} ${ubeaddr};cp.b ${ldaddr} ${ubsaddr} ${filesize};cmp.b ${ldaddr} ${ubsaddr} ${filesize}\0" \
182 "upgrade=run ubload ubflash\0"
184 /*-----------------------------------------------------------------------
188 /* Verified: CONFIG_PCI_PNP doesn't work */
189 #undef CONFIG_PCI_PNP
190 #define CONFIG_PCI_SCAN_SHOW
192 #ifndef CONFIG_PCI_PNP
193 /* Keep the following defines in sync with the BAT mappings */
195 #define PCI_ETH_IOADDR 0xbfff00
196 #define PCI_ETH_MEMADDR 0xbffffc00
197 #define PCI_IDE_IOADDR 0xbffed0
198 #define PCI_IDE_MEMADDR 0xbffffb00
199 #define PCI_USB0_IOADDR 0
200 #define PCI_USB0_MEMADDR 0xbfffe000
201 #define PCI_USB1_IOADDR 0
202 #define PCI_USB1_MEMADDR 0xbfffd000
203 #define PCI_USB2_IOADDR 0
204 #define PCI_USB2_MEMADDR 0xbfffcf00
208 /*-----------------------------------------------------------------------
212 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
214 #define CONFIG_TULIP_USE_IO
215 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
216 #define CONFIG_RTL8169
219 #define CONFIG_NET_RETRY_COUNT 5
221 #define CONFIG_NETCONSOLE
223 /*-----------------------------------------------------------------------
224 * Start addresses for the final memory configuration
225 * (Set up by the startup code)
226 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
228 #define CONFIG_SYS_SDRAM_BASE 0x00000000
230 #define CONFIG_SYS_FLASH_BASE 0xFFC00000
231 #define CONFIG_SYS_FLASH_SIZE 0x00400000
232 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
234 #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
235 #define CONFIG_SYS_EUMB_ADDR 0x80000000
236 #define CONFIG_SYS_PCI_MEM_ADDR 0xB0000000
237 #define CONFIG_SYS_MISC_REGION_ADDR 0xFE000000
239 #define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256 kB */
240 #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve some kB for malloc() */
242 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
243 #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 1M ... 8M in DRAM */
245 /* Maximum amount of RAM */
246 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
247 #define CONFIG_SYS_MAX_RAM_SIZE 0x04000000 /* 64MB of SDRAM */
248 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
249 #define CONFIG_SYS_MAX_RAM_SIZE 0x08000000 /* 128MB of SDRAM */
251 #error Unknown LinkStation type
254 /*-----------------------------------------------------------------------
255 * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build
257 * RAM based builds are for testing purposes. A Linux module, uloader.o,
258 * exists to load U-Boot and pass control to it
260 * Always do "make clean" after changing the build type
262 #if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE
263 #define CONFIG_SYS_RAMBOOT
266 /*-----------------------------------------------------------------------
267 * Definitions for initial stack pointer and data area
269 #if 1 /* RAM is available when the first C function is called */
270 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 0x1000)
272 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
274 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
275 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
277 /*----------------------------------------------------------------------
278 * Serial configuration
280 #define CONFIG_CONS_INDEX 1
281 #define CONFIG_BAUDRATE 57600
283 #define CONFIG_SYS_NS16550
284 #define CONFIG_SYS_NS16550_SERIAL
286 #define CONFIG_SYS_NS16550_REG_SIZE 1
288 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
290 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4600) /* Console port */
291 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_EUMB_ADDR + 0x4500) /* AVR port */
294 * Low Level Configuration Settings
295 * (address mappings, register initial values, etc.)
296 * You should know what you are doing if you make changes here.
297 * For the detail description refer to the MPC8245 user's manual.
299 * Unless indicated otherwise, the values are
300 * taken from the orignal Linkstation boot code
302 * Most of the low level configuration setttings are normally used
303 * in arch/powerpc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation.
304 * Low level initialisation is done in board/linkstation/early_init.S
305 * The values below are included for reference purpose only
308 /* FIXME: 32.768 MHz is the crystal frequency but */
309 /* the real frequency is lower by about 0.75% */
310 #define CONFIG_SYS_CLK_FREQ 32768000
311 #define CONFIG_SYS_HZ 1000
313 /* Bit-field values for MCCR1. */
314 #define CONFIG_SYS_ROMNAL 0
315 #define CONFIG_SYS_ROMFAL 11
317 #define CONFIG_SYS_BANK0_ROW 2 /* Only bank 0 used: 13 x n x 4 */
318 #define CONFIG_SYS_BANK1_ROW 0
319 #define CONFIG_SYS_BANK2_ROW 0
320 #define CONFIG_SYS_BANK3_ROW 0
321 #define CONFIG_SYS_BANK4_ROW 0
322 #define CONFIG_SYS_BANK5_ROW 0
323 #define CONFIG_SYS_BANK6_ROW 0
324 #define CONFIG_SYS_BANK7_ROW 0
326 /* Bit-field values for MCCR2. */
327 #define CONFIG_SYS_TSWAIT 0
328 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
329 #define CONFIG_SYS_REFINT 0x15e0
330 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
331 #define CONFIG_SYS_REFINT 0x1580
334 /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */
335 #define CONFIG_SYS_BSTOPRE 0x91c
337 /* Bit-field values for MCCR3. */
338 #define CONFIG_SYS_REFREC 7
340 /* Bit-field values for MCCR4. */
341 #define CONFIG_SYS_PRETOACT 2
342 #define CONFIG_SYS_ACTTOPRE 2 /* Original value was 2 */
343 #define CONFIG_SYS_ACTORW 2
344 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
345 #define CONFIG_SYS_SDMODE_CAS_LAT 2 /* For 100MHz bus */
346 /*#define CONFIG_SYS_SDMODE_BURSTLEN 3*/
347 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
348 #define CONFIG_SYS_SDMODE_CAS_LAT 3 /* For 133MHz bus */
349 /*#define CONFIG_SYS_SDMODE_BURSTLEN 2*/
351 #define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
352 #define CONFIG_SYS_EXTROM 1 /* Original setting but there is no EXTROM */
353 #define CONFIG_SYS_REGDIMM 0
354 #define CONFIG_SYS_DBUS_SIZE2 1
355 #define CONFIG_SYS_SDMODE_WRAP 0
357 #define CONFIG_SYS_PGMAX 0x32 /* All boards use this setting. Original 0x92 */
358 #define CONFIG_SYS_SDRAM_DSCD 0x30
360 /* Memory bank settings.
361 * Only bits 20-29 are actually used from these vales to set the
362 * start/end addresses. The upper two bits will always be 0, and the lower
363 * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
364 * address. Refer to the MPC8240 book.
367 #define CONFIG_SYS_BANK0_START 0x00000000
368 #define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1)
369 #define CONFIG_SYS_BANK0_ENABLE 1
370 #define CONFIG_SYS_BANK1_START 0x3ff00000
371 #define CONFIG_SYS_BANK1_END 0x3fffffff
372 #define CONFIG_SYS_BANK1_ENABLE 0
373 #define CONFIG_SYS_BANK2_START 0x3ff00000
374 #define CONFIG_SYS_BANK2_END 0x3fffffff
375 #define CONFIG_SYS_BANK2_ENABLE 0
376 #define CONFIG_SYS_BANK3_START 0x3ff00000
377 #define CONFIG_SYS_BANK3_END 0x3fffffff
378 #define CONFIG_SYS_BANK3_ENABLE 0
379 #define CONFIG_SYS_BANK4_START 0x3ff00000
380 #define CONFIG_SYS_BANK4_END 0x3fffffff
381 #define CONFIG_SYS_BANK4_ENABLE 0
382 #define CONFIG_SYS_BANK5_START 0x3ff00000
383 #define CONFIG_SYS_BANK5_END 0x3fffffff
384 #define CONFIG_SYS_BANK5_ENABLE 0
385 #define CONFIG_SYS_BANK6_START 0x3ff00000
386 #define CONFIG_SYS_BANK6_END 0x3fffffff
387 #define CONFIG_SYS_BANK6_ENABLE 0
388 #define CONFIG_SYS_BANK7_START 0x3ff00000
389 #define CONFIG_SYS_BANK7_END 0x3fffffff
390 #define CONFIG_SYS_BANK7_ENABLE 0
392 #define CONFIG_SYS_ODCR 0x15
394 /*----------------------------------------------------------------------
395 * Initial BAT mappings
399 * 1) GUARDED and WRITETHROUGH not allowed in IBATS
400 * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT
404 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
405 #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | BATU_VS | BATU_VP)
407 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
408 #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
410 /* EUMB: 1MB of address space */
411 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_EUMB_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
412 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_EUMB_ADDR | BATU_BL_1M | BATU_VS | BATU_VP)
414 #define CONFIG_SYS_DBAT1L (CONFIG_SYS_IBAT1L | BATL_GUARDEDSTORAGE)
415 #define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
417 /* PCI Mem: 256MB of address space */
418 #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI_MEM_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
419 #define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI_MEM_ADDR | BATU_BL_256M | BATU_VS | BATU_VP)
421 #define CONFIG_SYS_DBAT2L (CONFIG_SYS_IBAT2L | BATL_GUARDEDSTORAGE)
422 #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
424 /* PCI and local ROM/Flash: last 32MB of address space */
425 #define CONFIG_SYS_IBAT3L (CONFIG_SYS_MISC_REGION_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
426 #define CONFIG_SYS_IBAT3U (CONFIG_SYS_MISC_REGION_ADDR | BATU_BL_32M | BATU_VS | BATU_VP)
428 #define CONFIG_SYS_DBAT3L (CONFIG_SYS_IBAT3L | BATL_GUARDEDSTORAGE)
429 #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
432 * For booting Linux, the board info and command line data
433 * have to be in the first 8 MB of memory, since this is
434 * the maximum mapped by the Linux kernel during initialization.
436 * FIXME: This doesn't appear to be true for the newer kernels
437 * which map more that 8 MB
439 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
441 /*-----------------------------------------------------------------------
444 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
445 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
447 #undef CONFIG_SYS_FLASH_PROTECTION
448 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
449 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
450 #define CONFIG_SYS_MAX_FLASH_SECT 72 /* Max number of sectors per flash */
452 #define CONFIG_SYS_FLASH_ERASE_TOUT 12000
453 #define CONFIG_SYS_FLASH_WRITE_TOUT 1000
455 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
457 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
458 #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
460 #define CONFIG_ENV_IS_IN_FLASH
462 * The original LinkStation flash organisation uses
463 * 448 kB (0xFFF00000 - 0xFFF6FFFF) for the boot loader
464 * We use the last sector of this area to store the environment
465 * which leaves max. 384 kB for the U-Boot itself
467 #define CONFIG_ENV_ADDR 0xFFF60000
468 #define CONFIG_ENV_SIZE 0x00010000
469 #define CONFIG_ENV_SECT_SIZE 0x00010000
471 /*-----------------------------------------------------------------------
472 * Cache Configuration
474 #define CONFIG_SYS_CACHELINE_SIZE 32
475 #ifdef CONFIG_CMD_KGDB
476 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
479 /*-----------------------------------------------------------------------
480 * IDE/ATA definitions
482 #undef CONFIG_IDE_LED /* No IDE LED */
483 #define CONFIG_IDE_RESET /* no reset for ide supported */
484 #define CONFIG_IDE_PREINIT /* check for units */
485 #define CONFIG_LBA48 /* 48 bit LBA supported */
487 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN) || defined(CONFIG_HGLAN)
488 #define CONFIG_SYS_IDE_MAXBUS 1 /* Scan only 1 IDE bus */
489 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* Only 1 drive per IDE bus */
490 #elif defined(CONFIG_HGTL)
491 #define CONFIG_SYS_IDE_MAXBUS 2 /* Max. 2 IDE busses */
492 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
494 #error Config IDE: Unknown LinkStation type
497 #define CONFIG_SYS_ATA_BASE_ADDR 0
499 #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* Offset for data I/O */
500 #define CONFIG_SYS_ATA_REG_OFFSET 0 /* Offset for normal registers */
501 #define CONFIG_SYS_ATA_ALT_OFFSET 0 /* Offset for alternate registers */
503 /*-----------------------------------------------------------------------
504 * Partitions and file system
506 #define CONFIG_DOS_PARTITION
508 #endif /* __CONFIG_H */