2 * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
4 * SPDX-License-Identifier: GPL-2.0+
11 * Valid values for CONFIG_SYS_TEXT_BASE are:
13 * Standard configuration - all models
14 * 0xFFF00000 boot from flash
16 * Test configuration (boot from RAM using uloader.o)
17 * LinkStation HD-HLAN and KuroBox Standard
18 * 0x03F00000 boot from RAM
19 * LinkStation HD-HGLAN and KuroBox HG
20 * 0x07F00000 boot from RAM
22 #ifndef CONFIG_SYS_TEXT_BASE
23 #define CONFIG_SYS_TEXT_BASE 0xFFF00000
30 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
32 /*-----------------------------------------------------------------------
33 * User configurable settings:
35 * CONFIG_IPADDR_LS - the IP address of the LinkStation
36 * CONFIG_SERVERIP_LS - the address of the server for NFS/TFTP/DHCP/BOOTP
38 * CONFIG_NCIP_LS - the adress of the computer running net console
39 * if not configured, it will be set to
44 #define CONFIG_IPADDR_LS 192.168.11.150
45 #define CONFIG_SERVERIP_LS 192.168.11.149
47 #if !defined(CONFIG_IPADDR_LS) || !defined(CONFIG_SERVERIP_LS)
48 #error Both CONFIG_IPADDR_LS and CONFIG_SERVERIP_LS must be defined
51 #if !defined(CONFIG_NCIP_LS)
52 #define CONFIG_NCIP_LS CONFIG_SERVERIP_LS
55 /*----------------------------------------------------------------------
56 * DO NOT CHANGE ANYTHING BELOW, UNLESS YOU KNOW WHAT YOU ARE DOING
57 *---------------------------------------------------------------------*/
59 #define CONFIG_MPC8245 1
60 #define CONFIG_LINKSTATION 1
62 /*---------------------------------------
65 * LinkStation HDLAN /KuroBox Standard (CONFIG_HLAN)
66 * LinkStation old model (CONFIG_LAN) - totally untested
67 * LinkStation HGLAN / KuroBox HG (CONFIG_HGLAN)
69 * Models not supported yet
70 * TeraStatin (CONFIG_HTGL)
73 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
74 #define CONFIG_IDENT_STRING " LinkStation / KuroBox"
75 #elif defined(CONFIG_HGLAN)
76 #define CONFIG_IDENT_STRING " LinkStation HG / KuroBox HG"
77 #elif defined(CONFIG_HTGL)
78 #define CONFIG_IDENT_STRING " TeraStation"
80 #error No LinkStation model defined
83 #define CONFIG_BOOTDELAY 5
84 #define CONFIG_ZERO_BOOTDELAY_CHECK
85 #undef CONFIG_BOOT_RETRY_TIME
87 #define CONFIG_AUTOBOOT_KEYED
88 #define CONFIG_AUTOBOOT_PROMPT \
89 "Boot in %02d seconds ('s' to stop)...", bootdelay
90 #define CONFIG_AUTOBOOT_STOP_STR "s"
92 #define CONFIG_CMD_IDE
93 #define CONFIG_CMD_PCI
94 #define CONFIG_CMD_DHCP
95 #define CONFIG_CMD_PING
96 #define CONFIG_CMD_EXT2
98 #define CONFIG_BOOTP_MASK CONFIG_BOOTP_ALL
100 #define CONFIG_OF_LIBFDT 1
102 #define OF_STDOUT_PATH "/soc10x/serial@80004600"
104 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
105 #include <config_cmd_default.h>
108 * Miscellaneous configurable options
110 #define CONFIG_SYS_LONGHELP /* undef to save memory */
111 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
112 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
114 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
115 #define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
116 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
117 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Default load address: 8 MB */
119 #define CONFIG_BOOTCOMMAND "run bootcmd1"
120 #define CONFIG_BOOTARGS "root=/dev/sda1 console=ttyS1,57600 netconsole=@192.168.1.7/eth0,@192.168.1.1/00:50:BF:A4:59:71 rtc-rs5c372.probe=0,0x32 debug"
121 #define CONFIG_NFSBOOTCOMMAND "bootp;run nfsargs;bootm"
123 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
125 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
126 #define UBFILE "share/u-boot/u-boot-hd.flash.bin"
127 #elif defined(CONFIG_HGLAN)
128 #define UBFILE "share/u-boot/u-boot-hg.flash.bin"
129 #elif defined(CONFIG_HTGL)
130 #define UBFILE "share/u-boot/u-boot-ht.flash.bin"
132 #error No LinkStation model defined
135 #define CONFIG_EXTRA_ENV_SETTINGS \
140 "ipaddr="__stringify(CONFIG_IPADDR_LS)"\0" \
141 "netmask=255.255.255.0\0" \
142 "serverip="__stringify(CONFIG_SERVERIP_LS)"\0" \
143 "ncip="__stringify(CONFIG_NCIP_LS)"\0" \
145 "nc=setenv stdin nc;setenv stdout nc;setenv stderr nc\0" \
146 "ser=setenv stdin serial;setenv stdout serial;setenv stderr serial\0" \
149 "hdfile=boot/uImage\0" \
150 "hdload=echo Loading ${hdpart}:${hdfile};ext2load ide ${hdpart} ${ldaddr} ${hdfile};ext2load ide ${hdpart} 7f0000 boot/kuroboxHG.dtb\0" \
151 "boothd=setenv bootargs " CONFIG_BOOTARGS ";bootm ${ldaddr} - 7f0000\0" \
152 "hdboot=run hdload;run boothd\0" \
153 "flboot=setenv bootargs root=/dev/hda1;bootm ffc00000\0" \
154 "emboot=setenv bootargs root=/dev/ram0;bootm ffc00000\0" \
155 "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
156 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
158 "bootcmd1=run hdboot;run flboot\0" \
159 "bootcmd2=run flboot\0" \
160 "bootcmd3=run emboot\0" \
161 "writeng=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4e474e47 1;cp.b 800000 fff70000 4\0" \
162 "writeok=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4f4b4f4b 1;cp.b 800000 fff70000 4\0" \
164 "ubfile="UBFILE"\0" \
165 "ubload=echo Loading ${ubpart}:${ubfile};ext2load ide ${ubpart} ${ldaddr} ${ubfile}\0" \
166 "ubsaddr=fff00000\0" \
167 "ubeaddr=fff2ffff\0" \
168 "ubflash=protect off ${ubsaddr} ${ubeaddr};era ${ubsaddr} ${ubeaddr};cp.b ${ldaddr} ${ubsaddr} ${filesize};cmp.b ${ldaddr} ${ubsaddr} ${filesize}\0" \
169 "upgrade=run ubload ubflash\0"
171 /*-----------------------------------------------------------------------
175 #define CONFIG_PCI_INDIRECT_BRIDGE
176 /* Verified: CONFIG_PCI_PNP doesn't work */
177 #undef CONFIG_PCI_PNP
178 #define CONFIG_PCI_SCAN_SHOW
180 #ifndef CONFIG_PCI_PNP
181 /* Keep the following defines in sync with the BAT mappings */
183 #define PCI_ETH_IOADDR 0xbfff00
184 #define PCI_ETH_MEMADDR 0xbffffc00
185 #define PCI_IDE_IOADDR 0xbffed0
186 #define PCI_IDE_MEMADDR 0xbffffb00
187 #define PCI_USB0_IOADDR 0
188 #define PCI_USB0_MEMADDR 0xbfffe000
189 #define PCI_USB1_IOADDR 0
190 #define PCI_USB1_MEMADDR 0xbfffd000
191 #define PCI_USB2_IOADDR 0
192 #define PCI_USB2_MEMADDR 0xbfffcf00
196 /*-----------------------------------------------------------------------
200 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
202 #define CONFIG_TULIP_USE_IO
203 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
204 #define CONFIG_RTL8169
207 #define CONFIG_NET_RETRY_COUNT 5
209 #define CONFIG_NETCONSOLE
211 /*-----------------------------------------------------------------------
212 * Start addresses for the final memory configuration
213 * (Set up by the startup code)
214 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
216 #define CONFIG_SYS_SDRAM_BASE 0x00000000
218 #define CONFIG_SYS_FLASH_BASE 0xFFC00000
219 #define CONFIG_SYS_FLASH_SIZE 0x00400000
220 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
222 #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
223 #define CONFIG_SYS_EUMB_ADDR 0x80000000
224 #define CONFIG_SYS_PCI_MEM_ADDR 0xB0000000
225 #define CONFIG_SYS_MISC_REGION_ADDR 0xFE000000
227 #define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256 kB */
228 #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve some kB for malloc() */
230 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
231 #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 1M ... 8M in DRAM */
233 /* Maximum amount of RAM */
234 #if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
235 #define CONFIG_SYS_MAX_RAM_SIZE 0x04000000 /* 64MB of SDRAM */
236 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
237 #define CONFIG_SYS_MAX_RAM_SIZE 0x08000000 /* 128MB of SDRAM */
239 #error Unknown LinkStation type
242 /*-----------------------------------------------------------------------
243 * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build
245 * RAM based builds are for testing purposes. A Linux module, uloader.o,
246 * exists to load U-Boot and pass control to it
248 * Always do "make clean" after changing the build type
250 #if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE
251 #define CONFIG_SYS_RAMBOOT
254 /*-----------------------------------------------------------------------
255 * Definitions for initial stack pointer and data area
257 #if 1 /* RAM is available when the first C function is called */
258 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 0x1000)
260 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
262 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
263 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
265 /*----------------------------------------------------------------------
266 * Serial configuration
268 #define CONFIG_CONS_INDEX 1
269 #define CONFIG_BAUDRATE 57600
271 #define CONFIG_SYS_NS16550
272 #define CONFIG_SYS_NS16550_SERIAL
274 #define CONFIG_SYS_NS16550_REG_SIZE 1
276 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
278 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4600) /* Console port */
279 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_EUMB_ADDR + 0x4500) /* AVR port */
282 * Low Level Configuration Settings
283 * (address mappings, register initial values, etc.)
284 * You should know what you are doing if you make changes here.
285 * For the detail description refer to the MPC8245 user's manual.
287 * Unless indicated otherwise, the values are
288 * taken from the orignal Linkstation boot code
290 * Most of the low level configuration setttings are normally used
291 * in arch/powerpc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation.
292 * Low level initialisation is done in board/linkstation/early_init.S
293 * The values below are included for reference purpose only
296 /* FIXME: 32.768 MHz is the crystal frequency but */
297 /* the real frequency is lower by about 0.75% */
298 #define CONFIG_SYS_CLK_FREQ 32768000
299 #define CONFIG_SYS_HZ 1000
301 /* Bit-field values for MCCR1. */
302 #define CONFIG_SYS_ROMNAL 0
303 #define CONFIG_SYS_ROMFAL 11
305 #define CONFIG_SYS_BANK0_ROW 2 /* Only bank 0 used: 13 x n x 4 */
306 #define CONFIG_SYS_BANK1_ROW 0
307 #define CONFIG_SYS_BANK2_ROW 0
308 #define CONFIG_SYS_BANK3_ROW 0
309 #define CONFIG_SYS_BANK4_ROW 0
310 #define CONFIG_SYS_BANK5_ROW 0
311 #define CONFIG_SYS_BANK6_ROW 0
312 #define CONFIG_SYS_BANK7_ROW 0
314 /* Bit-field values for MCCR2. */
315 #define CONFIG_SYS_TSWAIT 0
316 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
317 #define CONFIG_SYS_REFINT 0x15e0
318 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
319 #define CONFIG_SYS_REFINT 0x1580
322 /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */
323 #define CONFIG_SYS_BSTOPRE 0x91c
325 /* Bit-field values for MCCR3. */
326 #define CONFIG_SYS_REFREC 7
328 /* Bit-field values for MCCR4. */
329 #define CONFIG_SYS_PRETOACT 2
330 #define CONFIG_SYS_ACTTOPRE 2 /* Original value was 2 */
331 #define CONFIG_SYS_ACTORW 2
332 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
333 #define CONFIG_SYS_SDMODE_CAS_LAT 2 /* For 100MHz bus */
334 /*#define CONFIG_SYS_SDMODE_BURSTLEN 3*/
335 #elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
336 #define CONFIG_SYS_SDMODE_CAS_LAT 3 /* For 133MHz bus */
337 /*#define CONFIG_SYS_SDMODE_BURSTLEN 2*/
339 #define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
340 #define CONFIG_SYS_EXTROM 1 /* Original setting but there is no EXTROM */
341 #define CONFIG_SYS_REGDIMM 0
342 #define CONFIG_SYS_DBUS_SIZE2 1
343 #define CONFIG_SYS_SDMODE_WRAP 0
345 #define CONFIG_SYS_PGMAX 0x32 /* All boards use this setting. Original 0x92 */
346 #define CONFIG_SYS_SDRAM_DSCD 0x30
348 /* Memory bank settings.
349 * Only bits 20-29 are actually used from these vales to set the
350 * start/end addresses. The upper two bits will always be 0, and the lower
351 * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
352 * address. Refer to the MPC8240 book.
355 #define CONFIG_SYS_BANK0_START 0x00000000
356 #define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1)
357 #define CONFIG_SYS_BANK0_ENABLE 1
358 #define CONFIG_SYS_BANK1_START 0x3ff00000
359 #define CONFIG_SYS_BANK1_END 0x3fffffff
360 #define CONFIG_SYS_BANK1_ENABLE 0
361 #define CONFIG_SYS_BANK2_START 0x3ff00000
362 #define CONFIG_SYS_BANK2_END 0x3fffffff
363 #define CONFIG_SYS_BANK2_ENABLE 0
364 #define CONFIG_SYS_BANK3_START 0x3ff00000
365 #define CONFIG_SYS_BANK3_END 0x3fffffff
366 #define CONFIG_SYS_BANK3_ENABLE 0
367 #define CONFIG_SYS_BANK4_START 0x3ff00000
368 #define CONFIG_SYS_BANK4_END 0x3fffffff
369 #define CONFIG_SYS_BANK4_ENABLE 0
370 #define CONFIG_SYS_BANK5_START 0x3ff00000
371 #define CONFIG_SYS_BANK5_END 0x3fffffff
372 #define CONFIG_SYS_BANK5_ENABLE 0
373 #define CONFIG_SYS_BANK6_START 0x3ff00000
374 #define CONFIG_SYS_BANK6_END 0x3fffffff
375 #define CONFIG_SYS_BANK6_ENABLE 0
376 #define CONFIG_SYS_BANK7_START 0x3ff00000
377 #define CONFIG_SYS_BANK7_END 0x3fffffff
378 #define CONFIG_SYS_BANK7_ENABLE 0
380 #define CONFIG_SYS_ODCR 0x15
382 /*----------------------------------------------------------------------
383 * Initial BAT mappings
387 * 1) GUARDED and WRITETHROUGH not allowed in IBATS
388 * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT
392 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
393 #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | BATU_VS | BATU_VP)
395 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
396 #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
398 /* EUMB: 1MB of address space */
399 #define CONFIG_SYS_IBAT1L (CONFIG_SYS_EUMB_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
400 #define CONFIG_SYS_IBAT1U (CONFIG_SYS_EUMB_ADDR | BATU_BL_1M | BATU_VS | BATU_VP)
402 #define CONFIG_SYS_DBAT1L (CONFIG_SYS_IBAT1L | BATL_GUARDEDSTORAGE)
403 #define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
405 /* PCI Mem: 256MB of address space */
406 #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI_MEM_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
407 #define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI_MEM_ADDR | BATU_BL_256M | BATU_VS | BATU_VP)
409 #define CONFIG_SYS_DBAT2L (CONFIG_SYS_IBAT2L | BATL_GUARDEDSTORAGE)
410 #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
412 /* PCI and local ROM/Flash: last 32MB of address space */
413 #define CONFIG_SYS_IBAT3L (CONFIG_SYS_MISC_REGION_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
414 #define CONFIG_SYS_IBAT3U (CONFIG_SYS_MISC_REGION_ADDR | BATU_BL_32M | BATU_VS | BATU_VP)
416 #define CONFIG_SYS_DBAT3L (CONFIG_SYS_IBAT3L | BATL_GUARDEDSTORAGE)
417 #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
420 * For booting Linux, the board info and command line data
421 * have to be in the first 8 MB of memory, since this is
422 * the maximum mapped by the Linux kernel during initialization.
424 * FIXME: This doesn't appear to be true for the newer kernels
425 * which map more that 8 MB
427 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
429 /*-----------------------------------------------------------------------
432 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
433 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
435 #undef CONFIG_SYS_FLASH_PROTECTION
436 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
437 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
438 #define CONFIG_SYS_MAX_FLASH_SECT 72 /* Max number of sectors per flash */
440 #define CONFIG_SYS_FLASH_ERASE_TOUT 12000
441 #define CONFIG_SYS_FLASH_WRITE_TOUT 1000
443 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
445 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
446 #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
448 #define CONFIG_ENV_IS_IN_FLASH
450 * The original LinkStation flash organisation uses
451 * 448 kB (0xFFF00000 - 0xFFF6FFFF) for the boot loader
452 * We use the last sector of this area to store the environment
453 * which leaves max. 384 kB for the U-Boot itself
455 #define CONFIG_ENV_ADDR 0xFFF60000
456 #define CONFIG_ENV_SIZE 0x00010000
457 #define CONFIG_ENV_SECT_SIZE 0x00010000
459 /*-----------------------------------------------------------------------
460 * Cache Configuration
462 #define CONFIG_SYS_CACHELINE_SIZE 32
463 #ifdef CONFIG_CMD_KGDB
464 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
467 /*-----------------------------------------------------------------------
468 * IDE/ATA definitions
470 #undef CONFIG_IDE_LED /* No IDE LED */
471 #define CONFIG_IDE_RESET /* no reset for ide supported */
472 #define CONFIG_IDE_PREINIT /* check for units */
473 #define CONFIG_LBA48 /* 48 bit LBA supported */
475 #if defined(CONFIG_LAN) || defined(CONFIG_HLAN) || defined(CONFIG_HGLAN)
476 #define CONFIG_SYS_IDE_MAXBUS 1 /* Scan only 1 IDE bus */
477 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* Only 1 drive per IDE bus */
478 #elif defined(CONFIG_HGTL)
479 #define CONFIG_SYS_IDE_MAXBUS 2 /* Max. 2 IDE busses */
480 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
482 #error Config IDE: Unknown LinkStation type
485 #define CONFIG_SYS_ATA_BASE_ADDR 0
487 #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* Offset for data I/O */
488 #define CONFIG_SYS_ATA_REG_OFFSET 0 /* Offset for normal registers */
489 #define CONFIG_SYS_ATA_ALT_OFFSET 0 /* Offset for alternate registers */
491 /*-----------------------------------------------------------------------
492 * Partitions and file system
494 #define CONFIG_DOS_PARTITION
496 #endif /* __CONFIG_H */