Prepare v2023.10
[platform/kernel/u-boot.git] / include / configs / librem5.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2017 NXP
4  * Copyright 2018 Emcraft Systems
5  * Copyright 2022 Purism
6  *
7  */
8
9 #ifndef __LIBREM5_H
10 #define __LIBREM5_H
11
12 /* #define DEBUG */
13
14 #include <version.h>
15 #include <linux/sizes.h>
16 #include <asm/arch/imx-regs.h>
17
18 #define CFG_SYS_FSL_USDHC_NUM   2
19
20 #define CONSOLE_ON_UART1
21
22 #ifdef CONSOLE_ON_UART1
23 #define CFG_MXC_UART_BASE               UART1_BASE_ADDR
24 #define CONSOLE_UART_CLK                0
25 #define CONSOLE         "ttymxc0"
26 #elif defined(CONSOLE_ON_UART2)
27 #define CFG_MXC_UART_BASE               UART2_BASE_ADDR
28 #define CONSOLE_UART_CLK                1
29 #define CONSOLE         "ttymxc1"
30 #elif defined(CONSOLE_ON_UART3)
31 #define CFG_MXC_UART_BASE               UART3_BASE_ADDR
32 #define CONSOLE_UART_CLK                2
33 #define CONSOLE         "ttymxc2"
34 #elif defined(CONSOLE_ON_UART4)
35 #define CFG_MXC_UART_BASE               UART4_BASE_ADDR
36 #define CONSOLE_UART_CLK                3
37 #define CONSOLE         "ttymxc3"
38 #else
39 #define CFG_MXC_UART_BASE               UART1_BASE_ADDR
40 #define CONSOLE_UART_CLK                0
41 #define CONSOLE         "ttymxc0"
42 #endif
43
44 #ifndef CONFIG_SPL_BUILD
45 #define BOOT_TARGET_DEVICES(func) \
46         func(MMC, mmc, 0) \
47         func(USB, usb, 0) \
48         func(DHCP, dhcp, na)
49 #include <config_distro_bootcmd.h>
50 #else
51 #define BOOTENV
52 #endif
53
54 /* Initial environment variables */
55 #define CFG_EXTRA_ENV_SETTINGS          \
56         "scriptaddr=0x80000000\0" \
57         "pxefile_addr_r=0x80100000\0" \
58         "kernel_addr_r=0x80800000\0" \
59         "fdt_addr_r=0x84800000\0" \
60         "ramdisk_addr_r=0x85000000\0" \
61         "console=" CONSOLE ",115200\0" \
62         "bootargs=u_boot_version=" PLAIN_VERSION "\0" \
63         "stdin=usbacm,serial\0" \
64         "stdout=usbacm,serial\0" \
65         "stderr=usbacm,serial\0" \
66         BOOTENV
67
68 /* Link Definitions */
69
70 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
71 #define CFG_SYS_INIT_RAM_SIZE        0x80000
72
73 #define CFG_SYS_SDRAM_BASE           0x40000000
74 #define PHYS_SDRAM                      0x40000000
75 #define PHYS_SDRAM_SIZE                 0xc0000000 /* 3GB LPDDR4 one Rank */
76
77 /* Monitor Command Prompt */
78
79 #define CFG_SYS_FSL_ESDHC_ADDR       0
80
81 #endif