1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Copyright 2018 Emcraft Systems
5 * Copyright 2022 Purism
15 #include <linux/sizes.h>
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
20 #ifdef CONFIG_SPL_BUILD
22 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
24 #define CONFIG_POWER_BD71837
25 #define CONFIG_POWER_BD71837_I2C_BUS 0
26 #define CONFIG_POWER_BD71837_I2C_ADDR 0x4B
28 #endif /* CONFIG_SPL_BUILD*/
30 #define CONFIG_SYS_FSL_USDHC_NUM 2
32 #define CONFIG_USBD_HS
34 #define CONSOLE_ON_UART1
36 #ifdef CONSOLE_ON_UART1
37 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
38 #define CONSOLE_UART_CLK 0
39 #define CONSOLE "ttymxc0"
40 #elif defined(CONSOLE_ON_UART2)
41 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
42 #define CONSOLE_UART_CLK 1
43 #define CONSOLE "ttymxc1"
44 #elif defined(CONSOLE_ON_UART3)
45 #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
46 #define CONSOLE_UART_CLK 2
47 #define CONSOLE "ttymxc2"
48 #elif defined(CONSOLE_ON_UART4)
49 #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
50 #define CONSOLE_UART_CLK 3
51 #define CONSOLE "ttymxc3"
53 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
54 #define CONSOLE_UART_CLK 0
55 #define CONSOLE "ttymxc0"
58 #ifndef CONFIG_SPL_BUILD
59 #define BOOT_TARGET_DEVICES(func) \
63 #include <config_distro_bootcmd.h>
68 /* Initial environment variables */
69 #define CONFIG_EXTRA_ENV_SETTINGS \
70 "scriptaddr=0x80000000\0" \
71 "pxefile_addr_r=0x80100000\0" \
72 "kernel_addr_r=0x80800000\0" \
73 "fdt_addr_r=0x84800000\0" \
74 "ramdisk_addr_r=0x85000000\0" \
75 "console=" CONSOLE ",115200\0" \
76 "bootargs=u_boot_version=" PLAIN_VERSION "\0" \
77 "stdin=usbacm,serial\0" \
78 "stdout=usbacm,serial\0" \
79 "stderr=usbacm,serial\0" \
82 /* Link Definitions */
84 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
85 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
87 #define CONFIG_SYS_SDRAM_BASE 0x40000000
88 #define PHYS_SDRAM 0x40000000
89 #define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB LPDDR4 one Rank */
91 /* Monitor Command Prompt */
93 #define CONFIG_SYS_FSL_ESDHC_ADDR 0