1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2016 David Lechner <david@lechnology.com>
7 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
9 * Based on davinci_dvevm.h. Original Copyrights follow:
11 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
20 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
21 #define CONFIG_SYS_OSCIN_FREQ 24000000
22 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
23 #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
28 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
29 #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
30 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
32 /* memtest start addr */
34 /* memtest will be run on 16MB */
39 #define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
41 #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID)
44 * U-Boot general configuration
50 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
51 #define CONFIG_HWCONFIG /* enable hwconfig */
52 #define CONFIG_SETUP_INITRD_TAG
53 #define CONFIG_EXTRA_ENV_SETTINGS \
54 "bootenvfile=uEnv.txt\0" \
55 "fdtfile=da850-lego-ev3.dtb\0" \
59 "console=ttyS1,115200n8\0" \
60 "bootscraddr=0xC0600000\0" \
61 "fdtaddr=0xC0600000\0" \
62 "loadaddr=0xC0007FC0\0" \
63 "filesysaddr=0xC1180000\0" \
64 "fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \
65 "importbootenv=echo Importing environment...; " \
66 "env import -t ${loadaddr} ${filesize}\0" \
67 "loadbootenv=fatload mmc 0 ${loadaddr} ${bootenvfile}\0" \
68 "mmcargs=setenv bootargs console=${console} root=/dev/mmcblk0p2 rw " \
69 "rootwait ${optargs}\0" \
70 "mmcboot=bootm ${loadaddr}\0" \
71 "flashargs=setenv bootargs initrd=${filesysaddr},${filesyssize} " \
72 "root=/dev/ram0 rw rootfstype=squashfs console=${console} " \
74 "flashboot=sf probe 0; " \
75 "sf read ${fdtaddr} 0x40000 0x10000; " \
76 "sf read ${loadaddr} 0x50000 0x400000; " \
77 "sf read ${filesysaddr} 0x450000 0xA00000; " \
80 "loadimage=fatload mmc 0 ${loadaddr} uImage\0" \
81 "loadfdt=fatload mmc 0 ${fdtaddr} ${fdtfile}\0" \
82 "fdtfixup=fdt addr ${fdtaddr}; fdt resize; fdt chosen\0" \
83 "fdtboot=bootm ${loadaddr} - ${fdtaddr}\0" \
84 "loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
85 "bootscript=source ${bootscraddr}\0"
87 /* additions for new relocation code, must added to all boards */
88 #define CFG_SYS_SDRAM_BASE 0xc0000000
90 #include <asm/arch/hardware.h>
92 #endif /* __CONFIG_H */