2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 //only used in fdl2 .in uart download, the debug infors from serial will break the download process.
24 #define CONFIG_FDL2_PRINT 0
25 #define BOOT_NATIVE_LINUX (1)
27 #define CONFIG_SILENT_CONSOLE
28 #define CONFIG_GPIOLIB 1
31 #define U_BOOT_SPRD_VER 1
32 /*#define SPRD_EVM_TAG_ON 1*/
33 #ifdef SPRD_EVM_TAG_ON
34 #define SPRD_EVM_ADDR_START 0x40006000
35 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 #define CONFIG_L2_OFF 1
41 #define CONFIG_YAFFS2 1
43 #define BOOT_PART "boot"
44 //#define BOOT_PART "kernel"
45 #define RECOVERY_PART "recovery"
47 * SPREADTRUM BIGPHONE board - SoC Configuration
52 #define CONFIG_SP8810W
55 #define CHIP_ENDIAN_LITTLE
56 #define SC8800S_LITTLE_ENDIAN FALSE
57 #define _LITTLE_ENDIAN 1
58 #define EXT_MEM_TYPE_DDR 1
61 #define CONFIG_EMMC_BOOT
64 #define CONFIG_UEFI_PARTITION
65 #define CONFIG_EFI_PARTITION
66 //#define SPL_USB_DOWNLOAD
67 #define CONFIG_EXT4_SPARSE_DOWNLOAD
68 //#define CONFIG_EMMC_SPL
70 #ifdef CONFIG_EMMC_BOOT
71 #define EMMC_SECTOR_SIZE 512
72 #define CONFIG_SYS_EMMC_U_BOOT_SECTOR_NUM 0x400
75 #define CONFIG_RAM512M
76 #define BB_DRAM_TYPE_256MB_32BIT
77 #define CONFIG_MTD_NAND_SC8810 1
79 #define CONFIG_SYS_HZ 1000
80 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
82 //#define CONFIG_SYS_HUSH_PARSER
84 #ifdef CONFIG_SYS_HUSH_PARSER
85 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
88 #define FIXNV_SIZE (120 * 1024)
90 #define VMJALUNA_SIZE (0x4B000) /* 300K */
91 #define MODEM_SIZE (0x800000)
92 #define DSP_SIZE (3968 * 1024)
93 #define RUNTIMENV_SIZE (256 * 1024)
94 #define FIRMWARE_SIZE (0x9F8000)
95 #define CONFIG_SPL_LOAD_LEN (0x6000)
98 #define EMMC_SECTOR_SIZE 512
100 /*#define CMDLINE_NEED_CONV */
102 #define WATCHDOG_LOAD_VALUE 0x4000
103 #define CONFIG_SYS_STACK_SIZE 0x400
105 //SDIO HOST NUM for handshake
106 #define SDIO_APCP_HOST_SLOT_NUM 0
108 /* SDIO GPIO HANDSHAKE */
115 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
117 /* NAND BOOT is the only boot method */
118 #define CONFIG_NAND_U_BOOT
119 #define DYNAMIC_CRC_TABLE
120 /* Start copying real U-boot from the second page */
121 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
122 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
123 #define RAM_TYPPE_IS_SDRAM 0
125 /* Load U-Boot to this address */
126 #define CONFIG_SYS_NAND_U_BOOT_DST 0x0f800000
128 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
129 #define CONFIG_SYS_SDRAM_BASE 0x00000000
130 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + 256*1024*1024)
132 #ifdef CONFIG_NAND_SPL
133 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_END - 0x40000)
136 #define CONFIG_MMU_TABLE_ADDR (0x40000000)
137 #define CONFIG_SYS_INIT_SP_ADDR \
138 (CONFIG_SYS_SDRAM_END - 0x10000 - GENERATED_GBL_DATA_SIZE)
140 #define CONFIG_SKIP_LOWLEVEL_INIT
143 #define CONFIG_HW_WATCHDOG
145 #define CONFIG_DISPLAY_CPUINFO
147 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
148 #define CONFIG_SETUP_MEMORY_TAGS 1
149 #define CONFIG_INITRD_TAG 1
155 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
157 * Board has 2 32MB banks of DRAM but there is a bug when using
158 * both so only the first is configured
160 #define CONFIG_NR_DRAM_BANKS 1
162 #define PHYS_SDRAM_1 0x00000000
163 #define PHYS_SDRAM_1_SIZE 0x10000000
164 #if (CONFIG_NR_DRAM_BANKS == 2)
165 #define PHYS_SDRAM_2 0x90000000
166 #define PHYS_SDRAM_2_SIZE 0x02000000
169 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
170 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
171 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
176 #define CONFIG_SPRD_UART 1
177 #define CONFIG_SYS_SC8800X_UART1 1
178 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
179 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
180 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
183 * Flash & Environment
185 /* No NOR flash present */
186 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
187 #define CONFIG_SYS_NO_FLASH 1
188 #define CONFIG_ENV_IS_NOWHERE
189 #define CONFIG_ENV_SIZE (128 * 1024)
191 #define CONFIG_ENV_IS_IN_NAND
192 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
193 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
197 #define CONFIG_NAND_SC8810
198 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
199 #define CONFIG_SYS_MAX_NAND_DEVICE 1
200 #define CONFIG_SYS_NAND_BASE (0x60000000)
201 //#define CONFIG_JFFS2_NAND
202 //#define CONFIG_SPRD_NAND_HWECC
203 #define CONFIG_SYS_NAND_HW_ECC
204 #define CONFIG_SYS_NAND_LARGEPAGE
205 //#define CONFIG_SYS_NAND_5_ADDR_CYCLE
207 #define CONFIG_SYS_64BIT_VSPRINTF
209 #define CONFIG_CMD_MTDPARTS
210 #define CONFIG_MTD_PARTITIONS
211 #define CONFIG_MTD_DEVICE
212 #define CONFIG_CMD_UBI
213 #define CONFIG_RBTREE
215 /* U-Boot general configuration */
216 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
217 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
218 /* Print buffer sz */
219 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
220 sizeof(CONFIG_SYS_PROMPT) + 16)
221 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
222 /* Boot Argument Buffer Size */
223 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
224 #define CONFIG_CMDLINE_EDITING
225 #define CONFIG_SYS_LONGHELP
227 /* support OS choose */
228 #undef CONFIG_BOOTM_NETBSD
229 #undef CONFIG_BOOTM_RTEMS
231 /* U-Boot commands */
232 #include <config_cmd_default.h>
233 #define CONFIG_CMD_NAND
234 #undef CONFIG_CMD_FPGA
235 #undef CONFIG_CMD_LOADS
236 #undef CONFIG_CMD_NET
237 #undef CONFIG_CMD_NFS
238 #undef CONFIG_CMD_SETGETDCR
240 #define CONFIG_ENV_OVERWRITE
242 #ifdef SPRD_EVM_TAG_ON
243 #define CONFIG_BOOTDELAY 0
245 #define CONFIG_BOOTDELAY 0
246 #define CONFIG_ZERO_BOOTDELAY_CHECK
249 #define CONFIG_LOADADDR (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN - 4*1024*1024) /* loadaddr env var */
250 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
252 #define xstr(s) str(s)
255 #define MTDIDS_DEFAULT "nand0=sprd-nand"
256 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),256k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),250m(system),180m(userdata),20m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),3840k(productinfo),512k(kpanic)"
257 #define CONFIG_BOOTARGS "mem=240M init=/init "
259 #define CONFIG_LOOP_PER_JIFFY 3350528
260 #define COPY_LINUX_KERNEL_SIZE (0x600000)
261 #define LINUX_INITRD_NAME "modem"
263 #define CONFIG_BOOTCOMMAND "cboot normal"
264 #define CONFIG_EXTRA_ENV_SETTINGS ""
266 #ifdef CONFIG_CMD_NET
267 #define CONFIG_IPADDR 192.168.10.2
268 #define CONFIG_SERVERIP 192.168.10.5
269 #define CONFIG_NETMASK 255.255.255.0
270 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
271 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
274 #define CONFIG_NET_MULTI
275 #define CONFIG_CMD_DNS
276 #define CONFIG_CMD_NFS
277 #define CONFIG_CMD_RARP
278 #define CONFIG_CMD_PING
279 /*#define CONFIG_CMD_SNTP */
282 #define CONFIG_USB_GADGET_SC8800G
283 #define CONFIG_USB_DWC
284 #define CONFIG_USB_GADGET_DUALSPEED
286 //#define CONFIG_USB_ETHER
287 #define CONFIG_CMD_FASTBOOT
288 #define SCRATCH_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000)
289 #define FB_DOWNLOAD_BUF_SIZE (250*1024*1024)
292 #define CONFIG_CALIBRATION_MODE_NEW
293 #define CONFIG_AP_ADC_CALIBRATION
294 #define CONFIG_MODEM_CALIBERATE
295 //#define CONFIG_MODEM_CALI_UART /* uart calibration only */
296 #define CALIBRATION_CHANNEL 1 // 0 : UART0 1: UART1, 3 uart3
299 #define CONFIG_UPDATE_TFTP
301 #define CONFIG_OF_LIBFDT
302 #define CONFIG_SYS_MAX_FLASH_BANKS 1
303 #define CONFIG_SYS_MAX_FLASH_SECT 128
307 #define CONFIG_SPLASH_SCREEN
308 #define LCD_BPP LCD_COLOR16
310 //#define CONFIG_LCD_WVGA 1
311 #define CONFIG_LCD_QVGA 1
312 //#define CONFIG_LCD_HVGA 1
314 #define CONFIG_MACH_KYLEW 1
315 //#define CONFIG_LCD_INFO
316 //#define LCD_TEST_PATTERN
317 //#define CONFIG_LCD_LOGO
318 #define CONFIG_LCD_S6D04H0 1
319 #define CONFIG_SYS_WHITE_ON_BLACK
320 #ifdef LCD_TEST_PATTERN
321 #define CONSOLE_COLOR_RED 0xf800
322 #define CONSOLE_COLOR_GREEN 0x07e0
323 #define CONSOLE_COLOR_YELLOW 0x07e0
324 #define CONSOLE_COLOR_BLUE 0x001f
325 #define CONSOLE_COLOR_MAGENTA 0x001f
326 #define CONSOLE_COLOR_CYAN 0x001f
333 #define CONFIG_CMD_MMC
334 #ifdef CONFIG_CMD_MMC
335 #define CONFIG_CMD_FAT 1
336 #define CONFIG_FAT_WRITE 1
337 #define CONFIG_GENERIC_MMC 1
338 #define CONFIG_SDHCI 1
339 //#define CONFIG_SDIO_HOST 1
340 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
341 #define CONFIG_MMC_SDMA 1
342 #define CONFIG_MV_SDHCI 1
343 #define CONFIG_DOS_PARTITION 1
344 #define CONFIG_SYS_MMC_NUM 2
345 #define CONFIG_SYS_MMC_BASE {0x20500000,0x20510000}
348 #define CALIBRATE_ENUM_MS 15000
349 #define CALIBRATE_IO_MS 10000
351 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
352 #define LOW_BAT_VOL_CHG 3300 //3.3V charger connect
354 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
355 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
356 #endif /* __CONFIG_H */