Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot...
[platform/kernel/u-boot.git] / include / configs / kontron_pitx_imx8m.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2
3 #ifndef __KONTRON_PITX_IMX8M_H
4 #define __KONTRON_PITX_IMX8M_H
5
6 #include <linux/sizes.h>
7 #include <linux/stringify.h>
8 #include <asm/arch/imx-regs.h>
9
10 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
11
12 #define CONFIG_SYS_MONITOR_LEN          (512 * SZ_1K)
13
14 /* GUID for capsule updatable firmware image */
15 #define KONTRON_PITX_IMX8M_FIT_IMAGE_GUID \
16         EFI_GUID(0xc898e959, 0x5b1f, 0x4e6d, 0x88, 0xe0, \
17                  0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99)
18
19 #ifdef CONFIG_SPL_BUILD
20 #define CONFIG_SYS_SPL_PTE_RAM_BASE     0x41580000
21
22 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
23 #define CONFIG_MALLOC_F_ADDR            0x182000
24 /* For RAW image gives a error info not panic */
25
26
27 #define CONFIG_POWER_PFUZE100
28 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
29 #endif
30
31 /* ENET1 Config */
32 #if defined(CONFIG_CMD_NET)
33 #define CONFIG_FEC_MXC_PHYADDR          0
34
35 #define PHY_ANEG_TIMEOUT                20000
36
37 #endif
38
39 #define ENV_MEM_LAYOUT_SETTINGS \
40         "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
41         "kernel_addr_r=0x42000000\0" \
42         "fdt_addr_r=0x48000000\0" \
43         "fdtoverlay_addr_r=0x49000000\0" \
44         "ramdisk_addr_r=0x48080000\0" \
45         "scriptaddr=0x40000000\0" \
46         "pxefile_addr_r=0x40100000\0"
47
48 #define BOOT_TARGET_DEVICES(func) \
49         func(MMC, mmc, 0) \
50         func(MMC, mmc, 1) \
51         func(USB, usb, 0) \
52         func(DHCP, dhcp, na) \
53         func(PXE, pxe, 0)
54
55 #include <config_distro_bootcmd.h>
56
57 /* Initial environment variables */
58 #define CONFIG_EXTRA_ENV_SETTINGS               \
59         "image=Image\0" \
60         "console=ttymxc2,115200\0" \
61         "boot_fdt=try\0" \
62         "fdtfile=freescale/imx8mq-kontron-pitx-imx8m.dtb\0" \
63         "dfu_alt_info=mmc 0=flash-bin raw 0x42 0x1000 mmcpart 1\0"\
64         ENV_MEM_LAYOUT_SETTINGS \
65         BOOTENV
66
67
68 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
69 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
70
71 #define CONFIG_SYS_SDRAM_BASE           0x40000000
72 #define PHYS_SDRAM                      0x40000000
73 #define PHYS_SDRAM_SIZE                 0xC0000000 /* 3GB DDR */
74
75 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(3)
76
77 #define CONFIG_SYS_FSL_USDHC_NUM        2
78 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
79
80 #endif