include/configs/km_kirkwood.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2009
   4  * Marvell Semiconductor <www.marvell.com>
   5  * Prafulla Wadaskar <prafulla@marvell.com>
   6  *
   7  * (C) Copyright 2009
   8  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   9  *
  10  * (C) Copyright 2011-2012
  11  * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
  12  * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
  13  */
  14
  15 /*
  16  * for linking errors see
  17  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
  18  */
  19
  20 #ifndef _CONFIG_KM_KIRKWOOD_H
  21 #define _CONFIG_KM_KIRKWOOD_H
  22
  23 /* KM_KIRKWOOD */
  24 #if defined(CONFIG_KM_KIRKWOOD)
  25 #define CONFIG_HOSTNAME                 "km_kirkwood"
  26 #define CONFIG_KM_DISABLE_PCIE
  27
  28 /* KM_KIRKWOOD_PCI */
  29 #elif defined(CONFIG_KM_KIRKWOOD_PCI)
  30 #define CONFIG_HOSTNAME                 "km_kirkwood_pci"
  31 #define CONFIG_KM_UBI_PART_BOOT_OPTS            ",2048"
  32 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
  33
  34 /* KM_KIRKWOOD_128M16 */
  35 #elif defined(CONFIG_KM_KIRKWOOD_128M16)
  36 #define CONFIG_HOSTNAME                 "km_kirkwood_128m16"
  37 #define CONFIG_KM_DISABLE_PCIE
  38
  39 /* KM_NUSA */
  40 #elif defined(CONFIG_KM_NUSA)
  41
  42 #define CONFIG_HOSTNAME                 "kmnusa"
  43
  44 /* KMCOGE5UN */
  45 #elif defined(CONFIG_KM_COGE5UN)
  46 #define CONFIG_HOSTNAME                 "kmcoge5un"
  47 #define CONFIG_KM_DISABLE_PCIE
  48
  49 /* KM_SUSE2 */
  50 #elif defined(CONFIG_KM_SUSE2)
  51 #define CONFIG_HOSTNAME                 "kmsuse2"
  52 #define CONFIG_KM_UBI_PART_BOOT_OPTS            ",2048"
  53 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
  54 #else
  55 #error ("Board unsupported")
  56 #endif
  57
  58 /* include common defines/options for all arm based Keymile boards */
  59 #include "km/km_arm.h"
  60
  61 #if defined(CONFIG_KM_PIGGY4_88E6352)
  62 /*
  63  * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
  64  * an Marvell 88E6352 simple switch.
  65  * In this case we have to change the default settings for the etherent mac.
  66  * There is NO ethernet phy. The ARM and Switch are conencted directly over
  67  * RGMII in MAC-MAC mode
  68  * In this case 1GBit full duplex and autoneg off
  69  */
  70 #define PORT_SERIAL_CONTROL_VALUE               ( \
  71         MVGBE_FORCE_LINK_PASS                       | \
  72         MVGBE_DIS_AUTO_NEG_FOR_DUPLX            | \
  73         MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL        | \
  74         MVGBE_ADV_NO_FLOW_CTRL                      | \
  75         MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX     | \
  76         MVGBE_FORCE_BP_MODE_NO_JAM                  | \
  77         (1 << 9) /* Reserved bit has to be 1 */ | \
  78         MVGBE_DO_NOT_FORCE_LINK_FAIL            | \
  79         MVGBE_DIS_AUTO_NEG_SPEED_GMII           | \
  80         MVGBE_DTE_ADV_0                                 | \
  81         MVGBE_MIIPHY_MAC_MODE                       | \
  82         MVGBE_AUTO_NEG_NO_CHANGE                    | \
  83         MVGBE_MAX_RX_PACKET_1552BYTE            | \
  84         MVGBE_CLR_EXT_LOOPBACK                      | \
  85         MVGBE_SET_FULL_DUPLEX_MODE                  | \
  86         MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
  87         MVGBE_SET_GMII_SPEED_TO_1000        |\
  88         MVGBE_SET_MII_SPEED_TO_100)
  89
  90 #endif
  91
  92 #ifdef CONFIG_KM_PIGGY4_88E6061
  93 /*
  94  * Some keymile boards like mgcoge5un have their PIGGY4 connected via
  95  * an Marvell 88E6061 simple switch.
  96  * In this case we have to change the default settings for the
  97  * ethernet phy connected to the kirkwood.
  98  * In this case 100MB full duplex and autoneg off
  99  */
 100 #define PORT_SERIAL_CONTROL_VALUE               ( \
 101         MVGBE_FORCE_LINK_PASS                   | \
 102         MVGBE_DIS_AUTO_NEG_FOR_DUPLX            | \
 103         MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL        | \
 104         MVGBE_ADV_NO_FLOW_CTRL                  | \
 105         MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX     | \
 106         MVGBE_FORCE_BP_MODE_NO_JAM              | \
 107         (1 << 9) /* Reserved bit has to be 1 */ | \
 108         MVGBE_DO_NOT_FORCE_LINK_FAIL            | \
 109         MVGBE_DIS_AUTO_NEG_SPEED_GMII           | \
 110         MVGBE_DTE_ADV_0                         | \
 111         MVGBE_MIIPHY_MAC_MODE                   | \
 112         MVGBE_AUTO_NEG_NO_CHANGE                | \
 113         MVGBE_MAX_RX_PACKET_1552BYTE            | \
 114         MVGBE_CLR_EXT_LOOPBACK                  | \
 115         MVGBE_SET_FULL_DUPLEX_MODE              | \
 116         MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX        |\
 117         MVGBE_SET_GMII_SPEED_TO_10_100  |\
 118         MVGBE_SET_MII_SPEED_TO_100)
 119 #endif
 120
 121 #ifdef CONFIG_KM_DISABLE_PCIE
 122 #undef  CONFIG_KIRKWOOD_PCIE_INIT
 123 #endif
 124
 125 #endif /* _CONFIG_KM_KIRKWOOD */