3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 * High Level Configuration Options
16 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
17 #define CONFIG_JUPITER 1 /* ... on Jupiter board */
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
24 #ifndef CONFIG_SYS_TEXT_BASE
25 #define CONFIG_SYS_TEXT_BASE 0xFFF00000
28 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
30 #define CONFIG_BOARD_EARLY_INIT_R 1
31 #define CONFIG_BOARD_EARLY_INIT_F 1
33 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
36 * Serial console configuration
38 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
39 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
40 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
44 * 0x40000000 - 0x4fffffff - PCI Memory
45 * 0x50000000 - 0x50ffffff - PCI IO Space
48 #if defined(CONFIG_PCI)
49 #define CONFIG_PCI_SCAN_SHOW 1
50 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
52 #define CONFIG_PCI_MEM_BUS 0x40000000
53 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
54 #define CONFIG_PCI_MEM_SIZE 0x10000000
56 #define CONFIG_PCI_IO_BUS 0x50000000
57 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
58 #define CONFIG_PCI_IO_SIZE 0x01000000
61 #define CONFIG_SYS_XLB_PIPELINING 1
64 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
67 #define CONFIG_MAC_PARTITION
68 #define CONFIG_DOS_PARTITION
69 #define CONFIG_ISO_PARTITION
71 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
76 #define CONFIG_BOOTP_BOOTFILESIZE
77 #define CONFIG_BOOTP_BOOTPATH
78 #define CONFIG_BOOTP_GATEWAY
79 #define CONFIG_BOOTP_HOSTNAME
82 * Command line configuration.
85 #if defined(CONFIG_PCI)
86 #define CODFIG_CMD_PCI
93 #define CONFIG_PREBOOT "echo;" \
94 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
97 #undef CONFIG_BOOTARGS
99 #define CONFIG_EXTRA_ENV_SETTINGS \
101 "nfsargs=setenv bootargs root=/dev/nfs rw " \
102 "nfsroot=${serverip}:${rootpath}\0" \
103 "ramargs=setenv bootargs root=/dev/ram rw\0" \
104 "addip=setenv bootargs ${bootargs} " \
105 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
106 ":${hostname}:${netdev}:off panic=1\0" \
107 "flash_nfs=run nfsargs addip addcons;" \
108 "bootm ${kernel_addr}\0" \
109 "flash_self=run ramargs addip;" \
110 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
111 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
114 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
116 "rootpath=/opt/eldk/ppc_6xx\0" \
117 "bootfile=/tftpboot/jupiter/uImage\0" \
120 #define CONFIG_BOOTCOMMAND "run flash_self"
123 * IPB Bus clocking configuration.
125 #undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
128 /* pass open firmware flat tree */
129 #define OF_CPU "PowerPC,5200@0"
130 #define OF_SOC "soc5200@f0000000"
131 #define OF_TBCLK (bd->bi_busfreq / 8)
132 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
139 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
140 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
142 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
143 #define CONFIG_SYS_I2C_SLAVE 0x7F
146 * EEPROM configuration
148 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
149 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
150 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
151 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
155 * Flash configuration
157 #define CONFIG_SYS_FLASH_BASE 0xFF000000
158 #define CONFIG_SYS_FLASH_SIZE 0x01000000
160 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
162 #define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
164 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
165 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
167 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
169 #define CONFIG_FLASH_CFI_DRIVER
170 #define CONFIG_SYS_FLASH_CFI
171 #define CONFIG_SYS_FLASH_EMPTY_INFO
172 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
173 #define CONFIG_SYS_UPDATE_FLASH_SIZE 1
174 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
177 * Environment settings
179 #define CONFIG_ENV_IS_IN_FLASH 1
180 #define CONFIG_ENV_SIZE 0x20000
181 #define CONFIG_ENV_SECT_SIZE 0x20000
182 #define CONFIG_ENV_OVERWRITE 1
184 /* Address and size of Redundant Environment Sector */
185 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
186 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
191 #define CONFIG_SYS_MBAR 0xF0000000
192 #define CONFIG_SYS_SDRAM_BASE 0x00000000
193 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
195 /* Use SRAM until RAM will be available */
196 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
197 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
199 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
200 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
202 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
203 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
204 # define CONFIG_SYS_RAMBOOT 1
207 #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
208 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
209 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
212 * Ethernet configuration
214 #define CONFIG_MPC5xxx_FEC 1
215 #define CONFIG_MPC5xxx_FEC_MII100
217 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
219 /* #define CONFIG_MPC5xxx_FEC_MII10 */
220 #define CONFIG_PHY_ADDR 0x00
225 #define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
228 * Miscellaneous configurable options
230 #define CONFIG_SYS_LONGHELP /* undef to save memory */
232 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
233 #if defined(CONFIG_CMD_KGDB)
234 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
236 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
238 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
239 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
240 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
242 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
243 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
244 #define CONFIG_SYS_ALT_MEMTEST 1
246 #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
248 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
249 #if defined(CONFIG_CMD_KGDB)
250 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
254 * Various low-level settings
256 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
257 #define CONFIG_SYS_HID0_FINAL HID0_ICE
259 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
260 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
261 #define CONFIG_SYS_BOOTCS_CFG 0x00047801
262 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
263 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
265 #define CONFIG_SYS_CS_BURST 0x00000000
266 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
268 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
270 #endif /* __CONFIG_H */