3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * High Level Configuration Options
32 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
33 #define CONFIG_MPC5200 1 /* especially an MPC5200 */
34 #define CONFIG_JUPITER 1 /* ... on Jupiter board */
36 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
38 #define CONFIG_BOARD_EARLY_INIT_R 1
39 #define CONFIG_BOARD_EARLY_INIT_F 1
41 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
42 #define BOOTFLAG_WARM 0x02 /* Software reboot */
44 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
47 * Serial console configuration
49 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
50 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
51 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
55 * 0x40000000 - 0x4fffffff - PCI Memory
56 * 0x50000000 - 0x50ffffff - PCI IO Space
58 /*#define CONFIG_PCI */
60 #if defined(CONFIG_PCI)
61 #define CONFIG_PCI_PNP 1
62 #define CONFIG_PCI_SCAN_SHOW 1
63 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
65 #define CONFIG_PCI_MEM_BUS 0x40000000
66 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
67 #define CONFIG_PCI_MEM_SIZE 0x10000000
69 #define CONFIG_PCI_IO_BUS 0x50000000
70 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
71 #define CONFIG_PCI_IO_SIZE 0x01000000
74 #define CONFIG_SYS_XLB_PIPELINING 1
76 #define CONFIG_NET_MULTI 1
78 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
81 #define CONFIG_MAC_PARTITION
82 #define CONFIG_DOS_PARTITION
83 #define CONFIG_ISO_PARTITION
85 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
91 #define CONFIG_BOOTP_BOOTFILESIZE
92 #define CONFIG_BOOTP_BOOTPATH
93 #define CONFIG_BOOTP_GATEWAY
94 #define CONFIG_BOOTP_HOSTNAME
98 * Command line configuration.
100 #include <config_cmd_default.h>
102 #define CONFIG_CMD_NFS
103 #define CONFIG_CMD_SNTP
105 #if defined(CONFIG_PCI)
106 #define CODFIG_CMD_PCI
113 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
115 #define CONFIG_PREBOOT "echo;" \
116 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
119 #undef CONFIG_BOOTARGS
121 #define CONFIG_EXTRA_ENV_SETTINGS \
123 "nfsargs=setenv bootargs root=/dev/nfs rw " \
124 "nfsroot=${serverip}:${rootpath}\0" \
125 "ramargs=setenv bootargs root=/dev/ram rw\0" \
126 "addip=setenv bootargs ${bootargs} " \
127 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
128 ":${hostname}:${netdev}:off panic=1\0" \
129 "flash_nfs=run nfsargs addip addcons;" \
130 "bootm ${kernel_addr}\0" \
131 "flash_self=run ramargs addip;" \
132 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
133 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
136 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
138 "rootpath=/opt/eldk/ppc_6xx\0" \
139 "bootfile=/tftpboot/jupiter/uImage\0" \
142 #define CONFIG_BOOTCOMMAND "run flash_self"
145 * IPB Bus clocking configuration.
147 #undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
150 /* pass open firmware flat tree */
151 #define CONFIG_OF_LIBFDT 1
152 #define CONFIG_OF_BOARD_SETUP 1
154 #define OF_CPU "PowerPC,5200@0"
155 #define OF_SOC "soc5200@f0000000"
156 #define OF_TBCLK (bd->bi_busfreq / 8)
157 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
164 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
165 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
167 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
168 #define CONFIG_SYS_I2C_SLAVE 0x7F
171 * EEPROM configuration
173 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
174 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
175 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
176 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
180 * Flash configuration
182 #define CONFIG_SYS_FLASH_BASE 0xFF000000
183 #define CONFIG_SYS_FLASH_SIZE 0x01000000
185 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
187 #define CONFIG_ENV_ADDR (TEXT_BASE + 0x40000) /* third sector */
189 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
190 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
192 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
194 #define CONFIG_FLASH_CFI_DRIVER
195 #define CONFIG_SYS_FLASH_CFI
196 #define CONFIG_SYS_FLASH_EMPTY_INFO
197 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
198 #define CONFIG_SYS_UPDATE_FLASH_SIZE 1
199 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
202 * Environment settings
204 #define CONFIG_ENV_IS_IN_FLASH 1
205 #define CONFIG_ENV_SIZE 0x20000
206 #define CONFIG_ENV_SECT_SIZE 0x20000
207 #define CONFIG_ENV_OVERWRITE 1
209 /* Address and size of Redundant Environment Sector */
210 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
211 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
216 #define CONFIG_SYS_MBAR 0xF0000000
217 #define CONFIG_SYS_SDRAM_BASE 0x00000000
218 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
220 /* Use SRAM until RAM will be available */
221 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
222 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
225 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
226 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
227 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
229 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
230 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
231 # define CONFIG_SYS_RAMBOOT 1
234 #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
235 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
236 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
239 * Ethernet configuration
241 #define CONFIG_MPC5xxx_FEC 1
243 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
245 /* #define CONFIG_FEC_10MBIT 1 */
246 #define CONFIG_PHY_ADDR 0x00
251 #define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
254 * Miscellaneous configurable options
256 #define CONFIG_SYS_LONGHELP /* undef to save memory */
257 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
259 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
260 #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
261 #ifdef CONFIG_SYS_HUSH_PARSER
262 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
264 #if defined(CONFIG_CMD_KGDB)
265 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
267 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
269 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
270 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
271 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
273 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
274 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
275 #define CONFIG_SYS_ALT_MEMTEST 1
277 #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
279 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
281 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
282 #if defined(CONFIG_CMD_KGDB)
283 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
287 * Various low-level settings
289 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
290 #define CONFIG_SYS_HID0_FINAL HID0_ICE
292 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
293 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
294 #define CONFIG_SYS_BOOTCS_CFG 0x00047801
295 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
296 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
298 #define CONFIG_SYS_CS_BURST 0x00000000
299 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
301 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
303 #endif /* __CONFIG_H */