1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration header file for K3 J721S2 EVM
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
6 * David Huang <d-huang@ti.com>
9 #ifndef __CONFIG_J721S2_EVM_H
10 #define __CONFIG_J721S2_EVM_H
12 #include <linux/sizes.h>
13 #include <config_distro_bootcmd.h>
14 #include <environment/ti/mmc.h>
15 #include <environment/ti/k3_rproc.h>
16 #include <environment/ti/ufs.h>
17 #include <environment/ti/k3_dfu.h>
19 /* DDR Configuration */
20 #define CONFIG_SYS_SDRAM_BASE1 0x880000000
22 /* SPL Loader Configuration */
23 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
24 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M)
25 #define CONFIG_SYS_UBOOT_BASE 0x50280000
26 /* Image load address in RAM for DFU boot*/
28 #define CONFIG_SYS_UBOOT_BASE 0x50080000
30 * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
31 * possible (to allow the build to go through), as this directly affects
32 * our memory footprint. The less we use for BSS the more we have available
33 * for everything else.
35 #define CONFIG_SPL_BSS_MAX_SIZE 0xA000
37 * Link BSS to be within SPL in a dedicated region located near the top of
38 * the MCU SRAM, this way making it available also before relocation. Note
39 * that we are not using the actual top of the MCU SRAM as there is a memory
40 * location filled in by the boot ROM that we want to read out without any
41 * interference from the C context.
43 #define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\
44 CONFIG_SPL_BSS_MAX_SIZE)
45 /* Set the stack right below the SPL BSS section */
46 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
47 /* Configure R5 SPL post-relocation malloc pool in DDR */
48 #define CONFIG_SYS_SPL_MALLOC_START 0x84000000
49 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
50 /* Image load address in RAM for DFU boot*/
53 #define CONFIG_SYS_BOOTM_LEN SZ_64M
55 /* U-Boot general configuration */
56 #define EXTRA_ENV_J721S2_BOARD_SETTINGS \
57 "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
59 "setenv name_fdt ${default_device_tree};" \
60 "setenv fdtfile ${name_fdt}\0" \
62 "console=ttyS2,115200n8\0" \
63 "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000 " \
65 "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
67 #define PARTS_DEFAULT \
68 /* Linux partitions */ \
69 "uuid_disk=${uuid_gpt_disk};" \
70 "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
72 #ifdef CONFIG_SYS_K3_SPL_ATF
73 #if defined(CONFIG_TARGET_J721S2_R5_EVM)
74 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
75 "addr_mcur5f0_0load=0x89000000\0" \
76 "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
77 #elif defined(CONFIG_TARGET_J7200_R5_EVM)
78 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
79 "addr_mcur5f0_0load=0x89000000\0" \
80 "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0"
81 #endif /* CONFIG_TARGET_J721S2_R5_EVM */
83 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
84 #endif /* CONFIG_SYS_K3_SPL_ATF */
86 /* U-Boot MMC-specific configuration */
87 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
92 EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
94 "init_mmc=run args_all args_mmc\0" \
95 "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
97 "fdt address ${fdtaddr};" \
98 "fdt resize 0x100000;" \
99 "for overlay in $name_overlays;" \
101 "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
102 "fdt apply ${dtboaddr};" \
104 "partitions=" PARTS_DEFAULT \
105 "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
106 "${bootdir}/${name_kern}\0" \
107 "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
108 "${bootdir}/${name_fit}\0" \
109 "partitions=" PARTS_DEFAULT
111 /* Set the default list of remote processors to boot */
112 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
113 #ifdef DEFAULT_RPROCS
114 #undef DEFAULT_RPROCS
118 #ifdef CONFIG_TARGET_J721S2_A72_EVM
119 #define DEFAULT_RPROCS "" \
120 "2 /lib/firmware/j721s2-main-r5f0_0-fw " \
121 "3 /lib/firmware/j721s2-main-r5f0_1-fw " \
122 "4 /lib/firmware/j721s2-main-r5f1_0-fw " \
123 "5 /lib/firmware/j721s2-main-r5f1_1-fw " \
124 "6 /lib/firmware/j721s2-c71_0-fw " \
125 "7 /lib/firmware/j721s2-c71_1-fw "
126 #endif /* CONFIG_TARGET_J721S2_A72_EVM */
128 #ifdef CONFIG_TARGET_J7200_A72_EVM
129 #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
130 "do_main_cpsw0_qsgmii_phyinit=1\0" \
131 "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \
132 "gpio clear gpio@22_16\0" \
133 "main_cpsw0_qsgmii_phyinit=" \
134 "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \
135 "test ${boot} = mmc; then " \
136 "run init_main_cpsw0_qsgmii_phy;" \
138 #define DEFAULT_RPROCS "" \
139 "2 /lib/firmware/j7200-main-r5f0_0-fw " \
140 "3 /lib/firmware/j7200-main-r5f0_1-fw "
141 #endif /* CONFIG_TARGET_J7200_A72_EVM */
143 #ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
144 #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
147 /* set default dfu_bufsiz to 128KB (sector size of OSPI) */
148 #define EXTRA_ENV_DFUARGS \
154 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
155 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
156 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
157 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
159 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD
162 /* Incorporate settings into the U-Boot environment */
163 #define CONFIG_EXTRA_ENV_SETTINGS \
164 DEFAULT_LINUX_BOOT_ENV \
165 DEFAULT_MMC_TI_ARGS \
166 DEFAULT_FIT_TI_ARGS \
167 EXTRA_ENV_J721S2_BOARD_SETTINGS \
168 EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
169 EXTRA_ENV_RPROC_SETTINGS \
171 DEFAULT_UFS_TI_ARGS \
172 EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
173 EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
175 /* Now for the remaining common defines */
176 #include <configs/ti_armv7_common.h>
178 /* MMC ENV related defines */
180 #endif /* __CONFIG_J721S2_EVM_H */