1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration header file for K3 J721S2 EVM
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
6 * David Huang <d-huang@ti.com>
9 #ifndef __CONFIG_J721S2_EVM_H
10 #define __CONFIG_J721S2_EVM_H
12 #include <linux/sizes.h>
13 #include <config_distro_bootcmd.h>
14 #include <environment/ti/mmc.h>
15 #include <environment/ti/k3_rproc.h>
16 #include <environment/ti/ufs.h>
17 #include <environment/ti/k3_dfu.h>
19 /* DDR Configuration */
20 #define CONFIG_SYS_SDRAM_BASE1 0x880000000
22 /* SPL Loader Configuration */
23 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
24 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M)
25 #define CONFIG_SYS_UBOOT_BASE 0x50280000
26 /* Image load address in RAM for DFU boot*/
28 #define CONFIG_SYS_UBOOT_BASE 0x50080000
30 * Link BSS to be within SPL in a dedicated region located near the top of
31 * the MCU SRAM, this way making it available also before relocation. Note
32 * that we are not using the actual top of the MCU SRAM as there is a memory
33 * location filled in by the boot ROM that we want to read out without any
34 * interference from the C context.
36 #define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\
37 CONFIG_SPL_BSS_MAX_SIZE)
38 /* Set the stack right below the SPL BSS section */
39 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
40 /* Configure R5 SPL post-relocation malloc pool in DDR */
41 #define CONFIG_SYS_SPL_MALLOC_START 0x84000000
42 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
43 /* Image load address in RAM for DFU boot*/
46 #define CONFIG_SYS_BOOTM_LEN SZ_64M
48 /* U-Boot general configuration */
49 #define EXTRA_ENV_J721S2_BOARD_SETTINGS \
50 "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
52 "setenv name_fdt ${default_device_tree};" \
53 "setenv fdtfile ${name_fdt}\0" \
55 "console=ttyS2,115200n8\0" \
56 "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000 " \
58 "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
60 #define PARTS_DEFAULT \
61 /* Linux partitions */ \
62 "uuid_disk=${uuid_gpt_disk};" \
63 "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
65 #ifdef CONFIG_SYS_K3_SPL_ATF
66 #if defined(CONFIG_TARGET_J721S2_R5_EVM)
67 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
68 "addr_mcur5f0_0load=0x89000000\0" \
69 "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
70 #elif defined(CONFIG_TARGET_J7200_R5_EVM)
71 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
72 "addr_mcur5f0_0load=0x89000000\0" \
73 "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0"
74 #endif /* CONFIG_TARGET_J721S2_R5_EVM */
76 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
77 #endif /* CONFIG_SYS_K3_SPL_ATF */
79 /* U-Boot MMC-specific configuration */
80 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
85 EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
87 "init_mmc=run args_all args_mmc\0" \
88 "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
90 "fdt address ${fdtaddr};" \
91 "fdt resize 0x100000;" \
92 "for overlay in $name_overlays;" \
94 "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
95 "fdt apply ${dtboaddr};" \
97 "partitions=" PARTS_DEFAULT \
98 "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
99 "${bootdir}/${name_kern}\0" \
100 "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
101 "${bootdir}/${name_fit}\0" \
102 "partitions=" PARTS_DEFAULT
104 /* Set the default list of remote processors to boot */
105 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
106 #ifdef DEFAULT_RPROCS
107 #undef DEFAULT_RPROCS
111 #ifdef CONFIG_TARGET_J721S2_A72_EVM
112 #define DEFAULT_RPROCS "" \
113 "2 /lib/firmware/j721s2-main-r5f0_0-fw " \
114 "3 /lib/firmware/j721s2-main-r5f0_1-fw " \
115 "4 /lib/firmware/j721s2-main-r5f1_0-fw " \
116 "5 /lib/firmware/j721s2-main-r5f1_1-fw " \
117 "6 /lib/firmware/j721s2-c71_0-fw " \
118 "7 /lib/firmware/j721s2-c71_1-fw "
119 #endif /* CONFIG_TARGET_J721S2_A72_EVM */
121 #ifdef CONFIG_TARGET_J7200_A72_EVM
122 #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
123 "do_main_cpsw0_qsgmii_phyinit=1\0" \
124 "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \
125 "gpio clear gpio@22_16\0" \
126 "main_cpsw0_qsgmii_phyinit=" \
127 "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \
128 "test ${boot} = mmc; then " \
129 "run init_main_cpsw0_qsgmii_phy;" \
131 #define DEFAULT_RPROCS "" \
132 "2 /lib/firmware/j7200-main-r5f0_0-fw " \
133 "3 /lib/firmware/j7200-main-r5f0_1-fw "
134 #endif /* CONFIG_TARGET_J7200_A72_EVM */
136 #ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
137 #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
140 /* set default dfu_bufsiz to 128KB (sector size of OSPI) */
141 #define EXTRA_ENV_DFUARGS \
147 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
148 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
149 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
150 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
152 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD
155 /* Incorporate settings into the U-Boot environment */
156 #define CONFIG_EXTRA_ENV_SETTINGS \
157 DEFAULT_LINUX_BOOT_ENV \
158 DEFAULT_MMC_TI_ARGS \
159 DEFAULT_FIT_TI_ARGS \
160 EXTRA_ENV_J721S2_BOARD_SETTINGS \
161 EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
162 EXTRA_ENV_RPROC_SETTINGS \
164 DEFAULT_UFS_TI_ARGS \
165 EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
166 EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
168 /* Now for the remaining common defines */
169 #include <configs/ti_armv7_common.h>
171 /* MMC ENV related defines */
173 #endif /* __CONFIG_J721S2_EVM_H */