1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration header file for K3 J721S2 EVM
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
6 * David Huang <d-huang@ti.com>
9 #ifndef __CONFIG_J721S2_EVM_H
10 #define __CONFIG_J721S2_EVM_H
12 #include <linux/sizes.h>
13 #include <config_distro_bootcmd.h>
14 #include <environment/ti/mmc.h>
15 #include <environment/ti/k3_rproc.h>
16 #include <environment/ti/ufs.h>
17 #include <environment/ti/k3_dfu.h>
19 /* DDR Configuration */
20 #define CONFIG_SYS_SDRAM_BASE1 0x880000000
22 /* SPL Loader Configuration */
23 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
24 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
25 CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
26 #define CONFIG_SYS_UBOOT_BASE 0x50280000
27 /* Image load address in RAM for DFU boot*/
29 #define CONFIG_SYS_UBOOT_BASE 0x50080000
31 * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
32 * possible (to allow the build to go through), as this directly affects
33 * our memory footprint. The less we use for BSS the more we have available
34 * for everything else.
36 #define CONFIG_SPL_BSS_MAX_SIZE 0xA000
38 * Link BSS to be within SPL in a dedicated region located near the top of
39 * the MCU SRAM, this way making it available also before relocation. Note
40 * that we are not using the actual top of the MCU SRAM as there is a memory
41 * location filled in by the boot ROM that we want to read out without any
42 * interference from the C context.
44 #define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\
45 CONFIG_SPL_BSS_MAX_SIZE)
46 /* Set the stack right below the SPL BSS section */
47 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
48 /* Configure R5 SPL post-relocation malloc pool in DDR */
49 #define CONFIG_SYS_SPL_MALLOC_START 0x84000000
50 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
51 /* Image load address in RAM for DFU boot*/
54 #ifdef CONFIG_SYS_K3_SPL_ATF
55 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin"
58 #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
60 #define CONFIG_SYS_BOOTM_LEN SZ_64M
62 /* U-Boot general configuration */
63 #define EXTRA_ENV_J721S2_BOARD_SETTINGS \
64 "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
66 "setenv name_fdt ${default_device_tree};" \
67 "setenv fdtfile ${name_fdt}\0" \
69 "console=ttyS2,115200n8\0" \
70 "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000 " \
72 "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
74 #define PARTS_DEFAULT \
75 /* Linux partitions */ \
76 "uuid_disk=${uuid_gpt_disk};" \
77 "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
79 #ifdef CONFIG_SYS_K3_SPL_ATF
80 #if defined(CONFIG_TARGET_J721S2_R5_EVM)
81 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
82 "addr_mcur5f0_0load=0x89000000\0" \
83 "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
84 #elif defined(CONFIG_TARGET_J7200_R5_EVM)
85 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
86 "addr_mcur5f0_0load=0x89000000\0" \
87 "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0"
88 #endif /* CONFIG_TARGET_J721S2_R5_EVM */
90 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
91 #endif /* CONFIG_SYS_K3_SPL_ATF */
93 /* U-Boot MMC-specific configuration */
94 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
99 EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
101 "init_mmc=run args_all args_mmc\0" \
102 "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
104 "fdt address ${fdtaddr};" \
105 "fdt resize 0x100000;" \
106 "for overlay in $name_overlays;" \
108 "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
109 "fdt apply ${dtboaddr};" \
111 "partitions=" PARTS_DEFAULT \
112 "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
113 "${bootdir}/${name_kern}\0" \
114 "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
115 "${bootdir}/${name_fit}\0" \
116 "partitions=" PARTS_DEFAULT
118 /* Set the default list of remote processors to boot */
119 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
120 #ifdef DEFAULT_RPROCS
121 #undef DEFAULT_RPROCS
125 #ifdef CONFIG_TARGET_J721S2_A72_EVM
126 #define DEFAULT_RPROCS "" \
127 "2 /lib/firmware/j721s2-main-r5f0_0-fw " \
128 "3 /lib/firmware/j721s2-main-r5f0_1-fw " \
129 "4 /lib/firmware/j721s2-main-r5f1_0-fw " \
130 "5 /lib/firmware/j721s2-main-r5f1_1-fw " \
131 "6 /lib/firmware/j721s2-c71_0-fw " \
132 "7 /lib/firmware/j721s2-c71_1-fw "
133 #endif /* CONFIG_TARGET_J721S2_A72_EVM */
135 #ifdef CONFIG_TARGET_J7200_A72_EVM
136 #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
137 "do_main_cpsw0_qsgmii_phyinit=1\0" \
138 "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \
139 "gpio clear gpio@22_16\0" \
140 "main_cpsw0_qsgmii_phyinit=" \
141 "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \
142 "test ${boot} = mmc; then " \
143 "run init_main_cpsw0_qsgmii_phy;" \
145 #define DEFAULT_RPROCS "" \
146 "2 /lib/firmware/j7200-main-r5f0_0-fw " \
147 "3 /lib/firmware/j7200-main-r5f0_1-fw "
148 #endif /* CONFIG_TARGET_J7200_A72_EVM */
150 #ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
151 #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
154 /* set default dfu_bufsiz to 128KB (sector size of OSPI) */
155 #define EXTRA_ENV_DFUARGS \
161 #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
162 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
163 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
164 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
166 #define EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD
169 /* Incorporate settings into the U-Boot environment */
170 #define CONFIG_EXTRA_ENV_SETTINGS \
171 DEFAULT_LINUX_BOOT_ENV \
172 DEFAULT_MMC_TI_ARGS \
173 DEFAULT_FIT_TI_ARGS \
174 EXTRA_ENV_J721S2_BOARD_SETTINGS \
175 EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
176 EXTRA_ENV_RPROC_SETTINGS \
178 DEFAULT_UFS_TI_ARGS \
179 EXTRA_ENV_J721S2_BOARD_SETTINGS_MTD \
180 EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
182 /* Now for the remaining common defines */
183 #include <configs/ti_armv7_common.h>
185 /* MMC ENV related defines */
187 #endif /* __CONFIG_J721S2_EVM_H */