1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration header file for K3 J721E EVM
5 * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/
6 * Lokesh Vutla <lokeshvutla@ti.com>
9 #ifndef __CONFIG_J721E_EVM_H
10 #define __CONFIG_J721E_EVM_H
12 #include <linux/sizes.h>
13 #include <config_distro_bootcmd.h>
14 #include <environment/ti/mmc.h>
15 #include <environment/ti/k3_rproc.h>
16 #include <environment/ti/ufs.h>
17 #include <environment/ti/k3_dfu.h>
19 /* DDR Configuration */
20 #define CONFIG_SYS_SDRAM_BASE1 0x880000000
22 /* SPL Loader Configuration */
23 #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
24 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
25 CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
26 #define CONFIG_SYS_UBOOT_BASE 0x50280000
27 /* Image load address in RAM for DFU boot*/
29 #define CONFIG_SYS_UBOOT_BASE 0x50080000
31 * Maximum size in memory allocated to the SPL BSS. Keep it as tight as
32 * possible (to allow the build to go through), as this directly affects
33 * our memory footprint. The less we use for BSS the more we have available
34 * for everything else.
36 #define CONFIG_SPL_BSS_MAX_SIZE 0xA000
38 * Link BSS to be within SPL in a dedicated region located near the top of
39 * the MCU SRAM, this way making it available also before relocation. Note
40 * that we are not using the actual top of the MCU SRAM as there is a memory
41 * location filled in by the boot ROM that we want to read out without any
42 * interference from the C context.
44 #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
45 CONFIG_SPL_BSS_MAX_SIZE)
46 /* Set the stack right below the SPL BSS section */
47 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
48 /* Configure R5 SPL post-relocation malloc pool in DDR */
49 #define CONFIG_SYS_SPL_MALLOC_START 0x84000000
50 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
51 /* Image load address in RAM for DFU boot*/
54 #ifdef CONFIG_SYS_K3_SPL_ATF
55 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin"
58 #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
60 #define CONFIG_SYS_BOOTM_LEN SZ_64M
61 #define CONFIG_CQSPI_REF_CLK 133333333
63 /* HyperFlash related configuration */
64 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
66 /* U-Boot general configuration */
67 #define EXTRA_ENV_J721E_BOARD_SETTINGS \
68 "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
70 "setenv name_fdt ${default_device_tree};" \
71 "setenv fdtfile ${name_fdt}\0" \
72 "loadaddr=0x80080000\0" \
73 "fdtaddr=0x82000000\0" \
74 "overlayaddr=0x83000000\0" \
76 "console=ttyS2,115200n8\0" \
77 "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \
79 "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
81 #define PARTS_DEFAULT \
82 /* Linux partitions */ \
83 "uuid_disk=${uuid_gpt_disk};" \
84 "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
86 #ifdef CONFIG_SYS_K3_SPL_ATF
87 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
88 "addr_mainr5f0_0load=0x88000000\0" \
89 "name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0" \
90 "addr_mcur5f0_0load=0x89000000\0" \
91 "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
93 #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
94 #endif /* CONFIG_SYS_K3_SPL_ATF */
96 /* U-Boot MMC-specific configuration */
97 #define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
102 EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
104 "init_mmc=run args_all args_mmc\0" \
105 "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
107 "fdt address ${fdtaddr};" \
108 "fdt resize 0x100000;" \
109 "for overlay in $name_overlays;" \
111 "load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && " \
112 "fdt apply ${overlayaddr};" \
114 "partitions=" PARTS_DEFAULT \
115 "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
116 "${bootdir}/${name_kern}\0" \
117 "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
118 "${bootdir}/${name_fit}\0" \
119 "partitions=" PARTS_DEFAULT
121 /* Set the default list of remote processors to boot */
122 #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
123 #ifdef DEFAULT_RPROCS
124 #undef DEFAULT_RPROCS
128 #ifdef CONFIG_TARGET_J721E_A72_EVM
129 #define DEFAULT_RPROCS "" \
130 "3 /lib/firmware/j7-main-r5f0_1-fw " \
131 "4 /lib/firmware/j7-main-r5f1_0-fw " \
132 "5 /lib/firmware/j7-main-r5f1_1-fw " \
133 "6 /lib/firmware/j7-c66_0-fw " \
134 "7 /lib/firmware/j7-c66_1-fw " \
135 "8 /lib/firmware/j7-c71_0-fw "
136 #endif /* CONFIG_TARGET_J721E_A72_EVM */
138 #ifdef CONFIG_TARGET_J7200_A72_EVM
139 #define DEFAULT_RPROCS "" \
140 "2 /lib/firmware/j7200-main-r5f0_0-fw " \
141 "3 /lib/firmware/j7200-main-r5f0_1-fw "
142 #endif /* CONFIG_TARGET_J7200_A72_EVM */
144 /* set default dfu_bufsiz to 128KB (sector size of OSPI) */
145 #define EXTRA_ENV_DFUARGS \
146 "dfu_bufsiz=0x20000\0" \
152 #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
153 #define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \
154 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
155 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
157 #define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
160 /* Incorporate settings into the U-Boot environment */
161 #define CONFIG_EXTRA_ENV_SETTINGS \
162 DEFAULT_MMC_TI_ARGS \
163 DEFAULT_FIT_TI_ARGS \
164 EXTRA_ENV_J721E_BOARD_SETTINGS \
165 EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
166 EXTRA_ENV_RPROC_SETTINGS \
168 DEFAULT_UFS_TI_ARGS \
169 EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
171 /* Now for the remaining common defines */
172 #include <configs/ti_armv7_common.h>
174 /* MMC ENV related defines */
176 #endif /* __CONFIG_J721E_EVM_H */