4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Compact Integrator board.
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 * High Level Configuration Options
38 #define CFG_MEMTEST_START 0x100000
39 #define CFG_MEMTEST_END 0x10000000
41 #define CFG_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */
42 #define CFG_TIMERBASE 0x13000100
44 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS 1
46 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */
48 * Size of malloc() pool
50 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
51 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
56 #define CONFIG_DRIVER_SMC91111
57 #define CONFIG_SMC_USE_32_BIT
58 #define CONFIG_SMC91111_BASE 0xC8000000
59 #undef CONFIG_SMC91111_EXT_PHY
62 * NS16550 Configuration
64 #define CFG_PL011_SERIAL
65 #define CONFIG_PL011_CLOCK 14745600
66 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
67 #define CONFIG_CONS_INDEX 0
68 #define CONFIG_BAUDRATE 38400
69 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
70 #define CFG_SERIAL0 0x16000000
71 #define CFG_SERIAL1 0x17000000
77 #define CONFIG_BOOTP_BOOTFILESIZE
78 #define CONFIG_BOOTP_BOOTPATH
79 #define CONFIG_BOOTP_GATEWAY
80 #define CONFIG_BOOTP_HOSTNAME
84 * Command line configuration.
86 #define CONFIG_CMD_BDI
87 #define CONFIG_CMD_DHCP
88 #define CONFIG_CMD_ENV
89 #define CONFIG_CMD_FLASH
90 #define CONFIG_CMD_IMI
91 #define CONFIG_CMD_MEMORY
92 #define CONFIG_CMD_NET
93 #define CONFIG_CMD_PING
97 #define CONFIG_BOOTDELAY 2
98 #define CONFIG_BOOTARGS "root=/dev/nfs nfsroot=<IP address>:/<exported rootfs> mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
99 #define CONFIG_BOOTCOMMAND "bootp ; bootm"
101 /* The kernel command line & boot command below are for a platform flashed with afu.axf
103 Image 666 Block 0 End Block 0 address 0x24000000 exec 0x24000000- name u-boot
104 Image 667 Block 1 End Block 13 address 0x24040000 exec 0x24040000- name u-linux
105 Image 668 Block 14 End Block 33 address 0x24380000 exec 0x24380000- name rootfs
106 SIB at Block62 End Block62 address 0x24f80000
109 #define CONFIG_BOOTDELAY 2
110 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0 console=ttyAMA0"
111 #define CONFIG_BOOTCOMMAND "cp 0x24080000 0x7fc0 0x100000; bootm"
114 * Miscellaneous configurable options
116 #define CFG_LONGHELP /* undef to save memory */
117 #define CFG_PROMPT "Integrator-CP # " /* Monitor Command Prompt */
118 #define CFG_CBSIZE 256 /* Console I/O Buffer Size*/
119 /* Print Buffer Size */
120 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
121 #define CFG_MAXARGS 16 /* max number of command args */
122 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size*/
124 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
125 #define CFG_LOAD_ADDR 0x7fc0 /* default load address */
127 /*-----------------------------------------------------------------------
130 * The stack sizes are set up in start.S using the settings below
132 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
133 #ifdef CONFIG_USE_IRQ
134 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
135 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
138 /*-----------------------------------------------------------------------
139 * Physical Memory Map
141 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
142 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
143 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
145 /*-----------------------------------------------------------------------
146 * FLASH and environment organization
148 * Top varies according to amount fitted
149 * Reserve top 4 blocks of flash
153 * - U-Boot environment
155 * Base is always 0x24000000
158 #define CFG_FLASH_BASE 0x24000000
159 #define CFG_MAX_FLASH_SECT 64
160 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
161 #define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
162 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
163 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
165 #define CFG_MONITOR_LEN 0x00100000
166 #define CFG_ENV_IS_IN_FLASH (1)
169 * Move up the U-Boot & monitor area if more flash is fitted.
170 * If this U-Boot is to be run on Integrators with varying flash sizes,
171 * drivers/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG
172 * register and dynamically assign CFG_ENV_ADDR & CFG_MONITOR_BASE
173 * - CFG_MONITOR_BASE is set to indicate that the environment is not
174 * embedded in the boot monitor(s) area
176 #if ( PHYS_FLASH_SIZE == 0x04000000 )
178 #define CFG_ENV_ADDR 0x27F00000
179 #define CFG_MONITOR_BASE 0x27F40000
181 #elif (PHYS_FLASH_SIZE == 0x02000000 )
183 #define CFG_ENV_ADDR 0x25F00000
184 #define CFG_MONITOR_BASE 0x25F40000
188 #define CFG_ENV_ADDR 0x24F00000
189 #define CFG_MONITOR_BASE 0x27F40000
193 #define CFG_ENV_SECT_SIZE 0x40000 /* 256KB */
194 #define CFG_ENV_SIZE 8192 /* 8KB */
195 /*-----------------------------------------------------------------------
196 * CP control registers
198 #define CPCR_BASE 0xCB000000 /* CP Registers*/
199 #define OS_FLASHPROG 0x00000004 /* Flash register*/
200 #define CPMASK_EXTRABANK 0x8
201 #define CPMASK_FLASHSIZE 0x4
202 #define CPMASK_FLWREN 0x2
203 #define CPMASK_FLVPPEN 0x1
206 * The ARM boot monitor initializes the board.
207 * However, the default U-Boot code also performs the initialization.
208 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
209 * - see documentation supplied with board for details of how to choose the
210 * image to run at reset/power up
211 * e.g. whether the ARM Boot Monitor runs before U-Boot
213 #define CONFIG_SKIP_LOWLEVEL_INIT
218 * The ARM boot monitor does not relocate U-Boot.
219 * However, the default U-Boot code performs the relocation check,
220 * and may relocate the code if the memory map is changed.
221 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
223 #define SKIP_CONFIG_RELOCATE_UBOOT
226 /*-----------------------------------------------------------------------
227 * There are various dependencies on the core module (CM) fitted
228 * Users should refer to their CM user guide
229 * - when porting adjust u-boot/Makefile accordingly
230 * to define the necessary CONFIG_ s for the CM involved
231 * see e.g. cp_926ejs_config
234 #include "armcoremodule.h"
237 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
238 * the core module has a CM_INIT register
239 * then the U-Boot initialisation code will
240 * e.g. ARM Boot Monitor or pre-loader is repeated once
241 * (to re-initialise any existing CM_INIT settings to safe values).
243 * This is usually not the desired behaviour since the platform
244 * will either reboot into the ARM monitor (or pre-loader)
245 * or continuously cycle thru it without U-Boot running,
246 * depending upon the setting of Integrator/CP switch S2-4.
248 * However it may be needed if Integrator/CP switch S2-1
249 * is set OFF to boot direct into U-Boot.
250 * In that case comment out the line below.
251 #undef CONFIG_CM_INIT
254 #endif /* __CONFIG_H */