1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Linus Walleij <linus.walleij@linaro.org>
6 * Common ARM Integrator configuration settings
9 #define CONFIG_SYS_MEMTEST_START 0x100000
10 #define CONFIG_SYS_MEMTEST_END 0x10000000
11 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
12 #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
13 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
19 * There are various dependencies on the core module (CM) fitted
20 * Users should refer to their CM user guide
22 #include "armcoremodule.h"
25 * Initialize and remap the core module, use SPD to detect memory size
26 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
27 * the core module has a CM_INIT register
28 * then the U-Boot initialisation code will
29 * e.g. ARM Boot Monitor or pre-loader is repeated once
30 * (to re-initialise any existing CM_INIT settings to safe values).
32 * This is usually not the desired behaviour since the platform
33 * will either reboot into the ARM monitor (or pre-loader)
34 * or continuously cycle thru it without U-Boot running,
35 * depending upon the setting of Integrator/CP switch S2-4.
37 * However it may be needed if Integrator/CP switch S2-1
38 * is set OFF to boot direct into U-Boot.
39 * In that case comment out the line below.
41 #define CONFIG_CM_INIT
42 #define CONFIG_CM_REMAP
43 #define CONFIG_CM_SPD_DETECT
46 * The ARM boot monitor initializes the board.
47 * However, the default U-Boot code also performs the initialization.
48 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
49 * - see documentation supplied with board for details of how to choose the
50 * image to run at reset/power up
51 * e.g. whether the ARM Boot Monitor runs before U-Boot
53 /* #define CONFIG_SKIP_LOWLEVEL_INIT */
56 * The ARM boot monitor does not relocate U-Boot.
57 * However, the default U-Boot code performs the relocation check,
58 * and may relocate the code if the memory map is changed.
59 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
61 /* #define SKIP_CONFIG_RELOCATE_UBOOT */
66 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
67 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
68 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
69 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
70 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
71 CONFIG_SYS_INIT_RAM_SIZE - \
72 GENERATED_GBL_DATA_SIZE)
73 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
76 * FLASH and environment organization
77 * Top varies according to amount fitted
78 * Reserve top 4 blocks of flash
82 * - U-Boot environment
84 #define CONFIG_SYS_FLASH_CFI 1
85 #define CONFIG_FLASH_CFI_DRIVER 1
86 #define CONFIG_SYS_FLASH_BASE 0x24000000
87 #define CONFIG_SYS_MAX_FLASH_BANKS 1
89 /* Timeout values in ticks */
90 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
91 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
92 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
93 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */