4 * Linus Walleij <linus.walleij@linaro.org>
5 * Common ARM Integrator configuration settings
7 * SPDX-License-Identifier: GPL-2.0+
10 #define CONFIG_SYS_TEXT_BASE 0x01000000
11 #define CONFIG_SYS_MEMTEST_START 0x100000
12 #define CONFIG_SYS_MEMTEST_END 0x10000000
13 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
14 #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
15 #define CONFIG_SYS_LONGHELP
16 #define CONFIG_SYS_HUSH_PARSER
17 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
18 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
19 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
20 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
21 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_OF_LIBFDT /* enable passing a Device Tree */
26 #define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
27 #define CONFIG_SYS_GENERIC_BOARD
30 * There are various dependencies on the core module (CM) fitted
31 * Users should refer to their CM user guide
33 #include "armcoremodule.h"
36 * Initialize and remap the core module, use SPD to detect memory size
37 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
38 * the core module has a CM_INIT register
39 * then the U-Boot initialisation code will
40 * e.g. ARM Boot Monitor or pre-loader is repeated once
41 * (to re-initialise any existing CM_INIT settings to safe values).
43 * This is usually not the desired behaviour since the platform
44 * will either reboot into the ARM monitor (or pre-loader)
45 * or continuously cycle thru it without U-Boot running,
46 * depending upon the setting of Integrator/CP switch S2-4.
48 * However it may be needed if Integrator/CP switch S2-1
49 * is set OFF to boot direct into U-Boot.
50 * In that case comment out the line below.
52 #define CONFIG_CM_INIT
53 #define CONFIG_CM_REMAP
54 #define CONFIG_CM_SPD_DETECT
57 * The ARM boot monitor initializes the board.
58 * However, the default U-Boot code also performs the initialization.
59 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
60 * - see documentation supplied with board for details of how to choose the
61 * image to run at reset/power up
62 * e.g. whether the ARM Boot Monitor runs before U-Boot
64 /* #define CONFIG_SKIP_LOWLEVEL_INIT */
67 * The ARM boot monitor does not relocate U-Boot.
68 * However, the default U-Boot code performs the relocation check,
69 * and may relocate the code if the memory map is changed.
70 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
72 /* #define SKIP_CONFIG_RELOCATE_UBOOT */
78 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
79 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
80 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
81 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
82 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
83 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
84 CONFIG_SYS_INIT_RAM_SIZE - \
85 GENERATED_GBL_DATA_SIZE)
86 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
89 * FLASH and environment organization
90 * Top varies according to amount fitted
91 * Reserve top 4 blocks of flash
95 * - U-Boot environment
97 #define CONFIG_CMD_FLASH
98 #define CONFIG_CMD_ARMFLASH
99 #define CONFIG_SYS_FLASH_CFI 1
100 #define CONFIG_FLASH_CFI_DRIVER 1
101 #define CONFIG_SYS_FLASH_BASE 0x24000000
102 #define CONFIG_SYS_MAX_FLASH_BANKS 1
104 /* Timeout values in ticks */
105 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
106 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
107 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
108 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */