configs: mx6sxsabresd: drop CONFIG_SYS_FSL_USDHC_NUM
[platform/kernel/u-boot.git] / include / configs / imx8ulp_evk.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2020 NXP
4  */
5
6 #ifndef __IMX8ULP_EVK_H
7 #define __IMX8ULP_EVK_H
8
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
11
12 #define CONFIG_SYS_BOOTM_LEN            (SZ_64M)
13 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
14 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
15 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
16
17 #ifdef CONFIG_SPL_BUILD
18 #define CONFIG_SPL_STACK                0x22050000
19 #define CONFIG_SPL_BSS_START_ADDR       0x22048000
20 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000  /* 8 KB */
21 #define CONFIG_SYS_SPL_MALLOC_START     0x22040000
22 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x8000  /* 32 KB */
23
24 #define CONFIG_MALLOC_F_ADDR            0x22040000
25
26 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
27
28 #endif
29
30 #define COUNTER_FREQUENCY               1000000 /* 1MHz */
31
32 /* ENET Config */
33 #if defined(CONFIG_FEC_MXC)
34 #define PHY_ANEG_TIMEOUT                20000
35
36 #define CONFIG_FEC_MXC_PHYADDR          1
37 #endif
38
39 #ifdef CONFIG_DISTRO_DEFAULTS
40 #define BOOT_TARGET_DEVICES(func) \
41         func(MMC, mmc, 0)
42
43 #include <config_distro_bootcmd.h>
44 #else
45 #define BOOTENV
46 #endif
47
48 /* Initial environment variables */
49 #define CONFIG_EXTRA_ENV_SETTINGS               \
50         BOOTENV \
51         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
52         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
53         "image=Image\0" \
54         "console=ttyLP1,115200 earlycon\0" \
55         "fdt_addr_r=0x83000000\0"                       \
56         "boot_fit=no\0" \
57         "fdtfile=imx8ulp-evk.dtb\0" \
58         "initrd_addr=0x83800000\0"              \
59         "bootm_size=0x10000000\0" \
60         "mmcpart=1\0" \
61         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
62
63 /* Link Definitions */
64
65 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
66 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
67 #define CONFIG_SYS_INIT_SP_OFFSET       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
68 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
69
70 #define CONFIG_MMCROOT                  "/dev/mmcblk2p2"
71
72 #define CONFIG_SYS_SDRAM_BASE           0x80000000
73 #define PHYS_SDRAM                      0x80000000
74 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
75
76 /* Monitor Command Prompt */
77 #define CONFIG_SYS_CBSIZE               2048
78 #define CONFIG_SYS_MAXARGS              64
79 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
80 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
81
82 /* Using ULP WDOG for reset */
83 #define WDOG_BASE_ADDR                  WDG3_RBASE
84 #endif