1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __IMX8QXP_MEK_H
7 #define __IMX8QXP_MEK_H
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #ifdef CONFIG_SPL_BUILD
13 #define CONFIG_SPL_TEXT_BASE 0x0
14 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
15 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
16 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250
18 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
20 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
21 #define CONFIG_SPL_STACK 0x013E000
22 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
23 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
24 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000
25 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
26 #define CONFIG_SERIAL_LPUART_BASE 0x5a060000
27 #define CONFIG_SYS_ICACHE_OFF
28 #define CONFIG_SYS_DCACHE_OFF
29 #define CONFIG_MALLOC_F_ADDR 0x00120000
31 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
33 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
35 #define CONFIG_OF_EMBED
38 #define CONFIG_REMAKE_ELF
40 #define CONFIG_BOARD_EARLY_INIT_F
42 /* Flat Device Tree Definitions */
43 #define CONFIG_OF_BOARD_SETUP
45 #undef CONFIG_CMD_EXPORTENV
46 #undef CONFIG_CMD_IMPORTENV
47 #undef CONFIG_CMD_IMLS
49 #undef CONFIG_CMD_CRC32
50 #undef CONFIG_BOOTM_NETBSD
52 #define CONFIG_FSL_ESDHC
53 #define CONFIG_FSL_USDHC
54 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
55 #define USDHC1_BASE_ADDR 0x5B010000
56 #define USDHC2_BASE_ADDR 0x5B020000
57 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
59 #define CONFIG_ENV_OVERWRITE
61 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
63 /* Initial environment variables */
64 #define CONFIG_EXTRA_ENV_SETTINGS \
68 "console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \
69 "fdt_addr=0x83000000\0" \
70 "fdt_high=0xffffffffffffffff\0" \
72 "fdt_file=fsl-imx8qxp-mek.dtb\0" \
73 "initrd_addr=0x83800000\0" \
74 "initrd_high=0xffffffffffffffff\0" \
75 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
76 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
77 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
78 "mmcautodetect=yes\0" \
79 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
80 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
81 "bootscript=echo Running bootscript from mmc ...; " \
83 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
84 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
85 "mmcboot=echo Booting from mmc ...; " \
87 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
88 "if run loadfdt; then " \
89 "booti ${loadaddr} - ${fdt_addr}; " \
91 "echo WARN: Cannot load the DT; " \
94 "echo wait for boot; " \
96 "netargs=setenv bootargs console=${console} " \
98 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
99 "netboot=echo Booting from net ...; " \
101 "if test ${ip_dyn} = yes; then " \
102 "setenv get_cmd dhcp; " \
104 "setenv get_cmd tftp; " \
106 "${get_cmd} ${loadaddr} ${image}; " \
107 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
108 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
109 "booti ${loadaddr} - ${fdt_addr}; " \
111 "echo WARN: Cannot load the DT; " \
117 #define CONFIG_BOOTCOMMAND \
118 "mmc dev ${mmcdev}; if mmc rescan; then " \
119 "if run loadbootscript; then " \
122 "if run loadimage; then " \
124 "else run netboot; " \
127 "else booti ${loadaddr} - ${fdt_addr}; fi"
129 /* Link Definitions */
130 #define CONFIG_LOADADDR 0x80280000
132 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
134 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000
136 /* Default environment is in SD */
137 #define CONFIG_ENV_SIZE 0x1000
138 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
139 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
141 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
143 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
144 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
145 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
146 #define CONFIG_SYS_FSL_USDHC_NUM 2
148 /* Size of malloc() pool */
149 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
151 #define CONFIG_SYS_SDRAM_BASE 0x80000000
152 #define PHYS_SDRAM_1 0x80000000
153 #define PHYS_SDRAM_2 0x880000000
154 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
155 /* LPDDR4 board total DDR is 3GB */
156 #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
159 #define CONFIG_BAUDRATE 115200
161 /* Monitor Command Prompt */
162 #define CONFIG_HUSH_PARSER
163 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
164 #define CONFIG_SYS_CBSIZE 2048
165 #define CONFIG_SYS_MAXARGS 64
166 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
167 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
168 sizeof(CONFIG_SYS_PROMPT) + 16)
170 /* Generic Timer Definitions */
171 #define COUNTER_FREQUENCY 8000000 /* 8MHz */
173 #ifndef CONFIG_DM_PCA953X
174 #define CONFIG_PCA953X
175 #define CONFIG_CMD_PCA953X
176 #define CONFIG_CMD_PCA953X_INFO
180 #define CONFIG_FEC_XCV_TYPE RGMII
181 #define FEC_QUIRK_ENET_MAC
183 #endif /* __IMX8QXP_MEK_H */