1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __IMX8QXP_MEK_H
7 #define __IMX8QXP_MEK_H
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #ifdef CONFIG_SPL_BUILD
13 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
14 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
16 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250
17 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
19 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
20 #define CONFIG_SPL_STACK 0x013E000
21 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
22 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
23 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000
24 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
25 #define CONFIG_SERIAL_LPUART_BASE 0x5a060000
26 #define CONFIG_MALLOC_F_ADDR 0x00120000
28 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
30 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
32 #define CONFIG_OF_EMBED
35 #define CONFIG_REMAKE_ELF
37 #define CONFIG_BOARD_EARLY_INIT_F
39 /* Flat Device Tree Definitions */
40 #define CONFIG_OF_BOARD_SETUP
42 #undef CONFIG_CMD_EXPORTENV
43 #undef CONFIG_CMD_IMPORTENV
44 #undef CONFIG_CMD_IMLS
46 #undef CONFIG_CMD_CRC32
47 #undef CONFIG_BOOTM_NETBSD
49 #define CONFIG_FSL_USDHC
50 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
51 #define USDHC1_BASE_ADDR 0x5B010000
52 #define USDHC2_BASE_ADDR 0x5B020000
54 #define CONFIG_ENV_OVERWRITE
56 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
58 /* Initial environment variables */
59 #define CONFIG_EXTRA_ENV_SETTINGS \
63 "console=ttyLP0,${baudrate} earlycon\0" \
64 "fdt_addr=0x83000000\0" \
65 "fdt_high=0xffffffffffffffff\0" \
67 "fdt_file=imx8qxp-mek.dtb\0" \
68 "initrd_addr=0x83800000\0" \
69 "initrd_high=0xffffffffffffffff\0" \
70 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
71 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
72 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
73 "mmcautodetect=yes\0" \
74 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
75 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
76 "bootscript=echo Running bootscript from mmc ...; " \
78 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
79 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
80 "mmcboot=echo Booting from mmc ...; " \
82 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
83 "if run loadfdt; then " \
84 "booti ${loadaddr} - ${fdt_addr}; " \
86 "echo WARN: Cannot load the DT; " \
89 "echo wait for boot; " \
91 "netargs=setenv bootargs console=${console} " \
93 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
94 "netboot=echo Booting from net ...; " \
96 "if test ${ip_dyn} = yes; then " \
97 "setenv get_cmd dhcp; " \
99 "setenv get_cmd tftp; " \
101 "${get_cmd} ${loadaddr} ${image}; " \
102 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
103 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
104 "booti ${loadaddr} - ${fdt_addr}; " \
106 "echo WARN: Cannot load the DT; " \
112 #define CONFIG_BOOTCOMMAND \
113 "mmc dev ${mmcdev}; if mmc rescan; then " \
114 "if run loadbootscript; then " \
117 "if run loadimage; then " \
119 "else run netboot; " \
122 "else booti ${loadaddr} - ${fdt_addr}; fi"
124 /* Link Definitions */
125 #define CONFIG_LOADADDR 0x80280000
127 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
129 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000
131 /* Default environment is in SD */
132 #define CONFIG_ENV_SIZE 0x1000
133 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
134 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
136 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
138 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
139 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
140 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
141 #define CONFIG_SYS_FSL_USDHC_NUM 2
143 /* Size of malloc() pool */
144 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
146 #define CONFIG_SYS_SDRAM_BASE 0x80000000
147 #define PHYS_SDRAM_1 0x80000000
148 #define PHYS_SDRAM_2 0x880000000
149 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
150 /* LPDDR4 board total DDR is 3GB */
151 #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
154 #define CONFIG_BAUDRATE 115200
156 /* Generic Timer Definitions */
157 #define COUNTER_FREQUENCY 8000000 /* 8MHz */
159 #ifndef CONFIG_DM_PCA953X
160 #define CONFIG_PCA953X
161 #define CONFIG_CMD_PCA953X
162 #define CONFIG_CMD_PCA953X_INFO
166 #define CONFIG_FEC_XCV_TYPE RGMII
167 #define FEC_QUIRK_ENET_MAC
169 #endif /* __IMX8QXP_MEK_H */