1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2017-2018 NXP
6 #ifndef __IMX8QM_ROM7720_H
7 #define __IMX8QM_ROM7720_H
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
15 #define CONFIG_SYS_BOOTMAPSZ (256 << 20)
16 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
17 #define USDHC1_BASE_ADDR 0x5B010000
18 #define USDHC2_BASE_ADDR 0x5B020000
19 #define USDHC3_BASE_ADDR 0x5B030000
21 #define CONFIG_SYS_BOOTM_LEN SZ_64M
27 "m4_0_image=m4_0.bin\0" \
28 "m4_1_image=m4_1.bin\0" \
29 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
30 "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
31 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
32 "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
34 #ifdef CONFIG_NAND_BOOT
35 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
37 #define MFG_NAND_PARTITION ""
40 #define CONFIG_MFG_ENV_SETTINGS \
41 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
43 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
44 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
45 "g_mass_storage.iSerialNumber=\"\" "\
49 "initrd_addr=0x83800000\0" \
50 "initrd_high=0xffffffffffffffff\0" \
51 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
53 /* Initial environment variables */
54 #define CONFIG_EXTRA_ENV_SETTINGS \
55 CONFIG_MFG_ENV_SETTINGS \
61 "fdt_addr=0x84000000\0" \
63 "fdt_file=imx8qm-rom7720-a1.dtb\0" \
64 "initrd_addr=0x83800000\0" \
65 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
67 "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
68 "mmcautodetect=yes\0" \
69 "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
70 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
71 "bootscript=echo Running bootscript from mmc ...; " \
73 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
74 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
75 "mmcboot=echo Booting from mmc ...; " \
77 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
78 "if run loadfdt; then " \
79 "booti ${loadaddr} - ${fdt_addr}; " \
81 "echo WARN: Cannot load the DT; " \
84 "echo wait for boot; " \
86 "netargs=setenv bootargs console=${console},${baudrate} " \
88 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
89 "netboot=echo Booting from net ...; " \
91 "if test ${ip_dyn} = yes; then " \
92 "setenv get_cmd dhcp; " \
94 "setenv get_cmd tftp; " \
96 "${get_cmd} ${loadaddr} ${image}; " \
97 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
98 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
99 "booti ${loadaddr} - ${fdt_addr}; " \
101 "echo WARN: Cannot load the DT; " \
107 /* Link Definitions */
109 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
110 * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
111 * USDHC2 is for SD, USDHC3 is for SD on base board
113 #define CONFIG_SYS_FSL_USDHC_NUM 3
115 #define CONFIG_SYS_SDRAM_BASE 0x80000000
116 #define PHYS_SDRAM_1 0x80000000
117 #define PHYS_SDRAM_2 0x880000000
118 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
119 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
120 #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
122 #include <linux/stringify.h>
123 #endif /* __IMX8QM_ROM7720_H */