include/configs/imx8qm_rom7720.h

   1 // SPDX-License-Identifier:     GPL-2.0+
   2 /*
   3  * Copyright 2017-2018 NXP
   4  */
   5
   6 #ifndef __IMX8QM_ROM7720_H
   7 #define __IMX8QM_ROM7720_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12 #define CONFIG_REMAKE_ELF
  13
  14 #define CONFIG_SPL_MAX_SIZE             (124 * 1024)
  15 #define CONFIG_SPL_BSS_START_ADDR       0x00128000
  16 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000  /* 4 KB */
  17
  18 #define CONFIG_FSL_USDHC
  19 #define CONFIG_SYS_BOOTMAPSZ            (256 << 20)
  20 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  21 #define USDHC1_BASE_ADDR                0x5B010000
  22 #define USDHC2_BASE_ADDR                0x5B020000
  23 #define USDHC3_BASE_ADDR                0x5B030000
  24
  25 /* FUSE command */
  26
  27 /* Boot M4 */
  28 #define M4_BOOT_ENV \
  29         "m4_0_image=m4_0.bin\0" \
  30         "m4_1_image=m4_1.bin\0" \
  31         "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
  32         "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
  33         "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
  34         "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
  35
  36 #ifdef CONFIG_NAND_BOOT
  37 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
  38 #else
  39 #define MFG_NAND_PARTITION ""
  40 #endif
  41
  42 #define CONFIG_MFG_ENV_SETTINGS \
  43         "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
  44                 "rdinit=/linuxrc " \
  45                 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
  46                 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
  47                 "g_mass_storage.iSerialNumber=\"\" "\
  48                 MFG_NAND_PARTITION \
  49                 "clk_ignore_unused "\
  50                 "\0" \
  51         "initrd_addr=0x83800000\0" \
  52         "initrd_high=0xffffffffffffffff\0" \
  53         "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
  54
  55 /* Initial environment variables */
  56 #define CONFIG_EXTRA_ENV_SETTINGS               \
  57         CONFIG_MFG_ENV_SETTINGS \
  58         M4_BOOT_ENV \
  59         "script=boot.scr\0" \
  60         "image=Image\0" \
  61         "panel=NULL\0" \
  62         "console=ttyLP0\0" \
  63         "fdt_addr=0x83000000\0"                 \
  64         "boot_fdt=try\0" \
  65         "fdt_file=imx8qm-rom7720-a1.dtb\0" \
  66         "initrd_addr=0x83800000\0"              \
  67         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  68         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  69         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  70         "mmcautodetect=yes\0" \
  71         "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
  72         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  73         "bootscript=echo Running bootscript from mmc ...; " \
  74                 "source\0" \
  75         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  76         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  77         "mmcboot=echo Booting from mmc ...; " \
  78                 "run mmcargs; " \
  79                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  80                         "if run loadfdt; then " \
  81                                 "booti ${loadaddr} - ${fdt_addr}; " \
  82                         "else " \
  83                                 "echo WARN: Cannot load the DT; " \
  84                         "fi; " \
  85                 "else " \
  86                         "echo wait for boot; " \
  87                 "fi;\0" \
  88         "netargs=setenv bootargs console=${console},${baudrate} " \
  89                 "root=/dev/nfs " \
  90                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
  91         "netboot=echo Booting from net ...; " \
  92                 "run netargs;  " \
  93                 "if test ${ip_dyn} = yes; then " \
  94                         "setenv get_cmd dhcp; " \
  95                 "else " \
  96                         "setenv get_cmd tftp; " \
  97                 "fi; " \
  98                 "${get_cmd} ${loadaddr} ${image}; " \
  99                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 100                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 101                                 "booti ${loadaddr} - ${fdt_addr}; " \
 102                         "else " \
 103                                 "echo WARN: Cannot load the DT; " \
 104                         "fi; " \
 105                 "else " \
 106                         "booti; " \
 107                 "fi;\0"
 108
 109 #define CONFIG_BOOTCOMMAND \
 110            "mmc dev ${mmcdev}; if mmc rescan; then " \
 111                    "if run loadbootscript; then " \
 112                            "run bootscript; " \
 113                    "else " \
 114                            "if run loadimage; then " \
 115                                    "run mmcboot; " \
 116                            "else run netboot; " \
 117                            "fi; " \
 118                    "fi; " \
 119            "else booti ${loadaddr} - ${fdt_addr}; fi"
 120
 121 /* Link Definitions */
 122
 123 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
 124
 125 /* Default environment is in SD */
 126
 127 #ifdef CONFIG_QSPI_BOOT
 128 #define CONFIG_ENV_SPI_BUS      CONFIG_SF_DEFAULT_BUS
 129 #define CONFIG_ENV_SPI_CS       CONFIG_SF_DEFAULT_CS
 130 #define CONFIG_ENV_SPI_MODE     CONFIG_SF_DEFAULT_MODE
 131 #define CONFIG_ENV_SPI_MAX_HZ   CONFIG_SF_DEFAULT_SPEED
 132 #endif
 133
 134 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 135
 136 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
 137  * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
 138  * USDHC2 is for SD, USDHC3 is for SD on base board
 139  */
 140 #define CONFIG_MMCROOT                  "/dev/mmcblk2p2"  /* USDHC3 */
 141 #define CONFIG_SYS_FSL_USDHC_NUM        3
 142
 143 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 144 #define PHYS_SDRAM_1                    0x80000000
 145 #define PHYS_SDRAM_2                    0x880000000
 146 #define PHYS_SDRAM_1_SIZE               0x80000000      /* 2 GB */
 147 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
 148 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 149
 150 /* Generic Timer Definitions */
 151 #define COUNTER_FREQUENCY               8000000 /* 8MHz */
 152
 153 /* Networking */
 154 #define CONFIG_FEC_XCV_TYPE             RGMII
 155
 156 #include <linux/stringify.h>
 157 #endif /* __IMX8QM_ROM7720_H */