include/configs/imx8qm_rom7720.h

   1 // SPDX-License-Identifier:     GPL-2.0+
   2 /*
   3  * Copyright 2017-2018 NXP
   4  */
   5
   6 #ifndef __IMX8QM_ROM7720_H
   7 #define __IMX8QM_ROM7720_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12 #define CONFIG_REMAKE_ELF
  13
  14 #define CONFIG_SPL_MAX_SIZE             (124 * 1024)
  15 #define CONFIG_SPL_BSS_START_ADDR       0x00128000
  16 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000  /* 4 KB */
  17
  18 #define CONFIG_FSL_USDHC
  19 #define CONFIG_SYS_BOOTMAPSZ            (256 << 20)
  20 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  21 #define USDHC1_BASE_ADDR                0x5B010000
  22 #define USDHC2_BASE_ADDR                0x5B020000
  23 #define USDHC3_BASE_ADDR                0x5B030000
  24
  25 #define CONFIG_SUPPORT_EMMC_BOOT        /* eMMC specific */
  26
  27 /* FUSE command */
  28
  29 /* Boot M4 */
  30 #define M4_BOOT_ENV \
  31         "m4_0_image=m4_0.bin\0" \
  32         "m4_1_image=m4_1.bin\0" \
  33         "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
  34         "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
  35         "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
  36         "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
  37
  38 #ifdef CONFIG_NAND_BOOT
  39 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
  40 #else
  41 #define MFG_NAND_PARTITION ""
  42 #endif
  43
  44 #define CONFIG_MFG_ENV_SETTINGS \
  45         "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
  46                 "rdinit=/linuxrc " \
  47                 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
  48                 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
  49                 "g_mass_storage.iSerialNumber=\"\" "\
  50                 MFG_NAND_PARTITION \
  51                 "clk_ignore_unused "\
  52                 "\0" \
  53         "initrd_addr=0x83800000\0" \
  54         "initrd_high=0xffffffffffffffff\0" \
  55         "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
  56
  57 /* Initial environment variables */
  58 #define CONFIG_EXTRA_ENV_SETTINGS               \
  59         CONFIG_MFG_ENV_SETTINGS \
  60         M4_BOOT_ENV \
  61         "script=boot.scr\0" \
  62         "image=Image\0" \
  63         "panel=NULL\0" \
  64         "console=ttyLP0\0" \
  65         "fdt_addr=0x83000000\0"                 \
  66         "boot_fdt=try\0" \
  67         "fdt_file=imx8qm-rom7720-a1.dtb\0" \
  68         "initrd_addr=0x83800000\0"              \
  69         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  70         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  71         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  72         "mmcautodetect=yes\0" \
  73         "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
  74         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  75         "bootscript=echo Running bootscript from mmc ...; " \
  76                 "source\0" \
  77         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  78         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  79         "mmcboot=echo Booting from mmc ...; " \
  80                 "run mmcargs; " \
  81                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  82                         "if run loadfdt; then " \
  83                                 "booti ${loadaddr} - ${fdt_addr}; " \
  84                         "else " \
  85                                 "echo WARN: Cannot load the DT; " \
  86                         "fi; " \
  87                 "else " \
  88                         "echo wait for boot; " \
  89                 "fi;\0" \
  90         "netargs=setenv bootargs console=${console},${baudrate} " \
  91                 "root=/dev/nfs " \
  92                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
  93         "netboot=echo Booting from net ...; " \
  94                 "run netargs;  " \
  95                 "if test ${ip_dyn} = yes; then " \
  96                         "setenv get_cmd dhcp; " \
  97                 "else " \
  98                         "setenv get_cmd tftp; " \
  99                 "fi; " \
 100                 "${get_cmd} ${loadaddr} ${image}; " \
 101                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 102                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 103                                 "booti ${loadaddr} - ${fdt_addr}; " \
 104                         "else " \
 105                                 "echo WARN: Cannot load the DT; " \
 106                         "fi; " \
 107                 "else " \
 108                         "booti; " \
 109                 "fi;\0"
 110
 111 #define CONFIG_BOOTCOMMAND \
 112            "mmc dev ${mmcdev}; if mmc rescan; then " \
 113                    "if run loadbootscript; then " \
 114                            "run bootscript; " \
 115                    "else " \
 116                            "if run loadimage; then " \
 117                                    "run mmcboot; " \
 118                            "else run netboot; " \
 119                            "fi; " \
 120                    "fi; " \
 121            "else booti ${loadaddr} - ${fdt_addr}; fi"
 122
 123 /* Link Definitions */
 124
 125 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
 126
 127 /* Default environment is in SD */
 128
 129 #ifdef CONFIG_QSPI_BOOT
 130 #define CONFIG_ENV_SPI_BUS      CONFIG_SF_DEFAULT_BUS
 131 #define CONFIG_ENV_SPI_CS       CONFIG_SF_DEFAULT_CS
 132 #define CONFIG_ENV_SPI_MODE     CONFIG_SF_DEFAULT_MODE
 133 #define CONFIG_ENV_SPI_MAX_HZ   CONFIG_SF_DEFAULT_SPEED
 134 #endif
 135
 136 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 137
 138 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
 139  * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
 140  * USDHC2 is for SD, USDHC3 is for SD on base board
 141  */
 142 #define CONFIG_MMCROOT                  "/dev/mmcblk2p2"  /* USDHC3 */
 143 #define CONFIG_SYS_FSL_USDHC_NUM        3
 144
 145 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 146 #define PHYS_SDRAM_1                    0x80000000
 147 #define PHYS_SDRAM_2                    0x880000000
 148 #define PHYS_SDRAM_1_SIZE               0x80000000      /* 2 GB */
 149 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
 150 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 151
 152 /* Generic Timer Definitions */
 153 #define COUNTER_FREQUENCY               8000000 /* 8MHz */
 154
 155 /* Networking */
 156 #define CONFIG_FEC_XCV_TYPE             RGMII
 157
 158 #include <linux/stringify.h>
 159 #endif /* __IMX8QM_ROM7720_H */