1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #ifdef CONFIG_SPL_BUILD
13 #define CONFIG_SPL_TEXT_BASE 0x0
14 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
15 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
16 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
18 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
20 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
21 #define CONFIG_SPL_STACK 0x013E000
22 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
23 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
24 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000
25 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
26 #define CONFIG_SERIAL_LPUART_BASE 0x5a060000
27 #define CONFIG_MALLOC_F_ADDR 0x00120000
29 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
31 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
33 #define CONFIG_OF_EMBED
36 #define CONFIG_REMAKE_ELF
38 #define CONFIG_BOARD_EARLY_INIT_F
40 /* Flat Device Tree Definitions */
41 #define CONFIG_OF_BOARD_SETUP
43 #undef CONFIG_CMD_EXPORTENV
44 #undef CONFIG_CMD_IMPORTENV
45 #undef CONFIG_CMD_IMLS
47 #undef CONFIG_CMD_CRC32
48 #undef CONFIG_BOOTM_NETBSD
50 #define CONFIG_FSL_USDHC
51 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
52 #define USDHC1_BASE_ADDR 0x5B010000
53 #define USDHC2_BASE_ADDR 0x5B020000
54 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
56 #define CONFIG_ENV_OVERWRITE
58 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
60 /* Initial environment variables */
61 #define CONFIG_EXTRA_ENV_SETTINGS \
65 "console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \
66 "fdt_addr=0x83000000\0" \
67 "fdt_high=0xffffffffffffffff\0" \
69 "fdt_file=fsl-imx8qxp-mek.dtb\0" \
70 "initrd_addr=0x83800000\0" \
71 "initrd_high=0xffffffffffffffff\0" \
72 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
73 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
74 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
75 "mmcautodetect=yes\0" \
76 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
77 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
78 "bootscript=echo Running bootscript from mmc ...; " \
80 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
81 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
82 "mmcboot=echo Booting from mmc ...; " \
84 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
85 "if run loadfdt; then " \
86 "booti ${loadaddr} - ${fdt_addr}; " \
88 "echo WARN: Cannot load the DT; " \
91 "echo wait for boot; " \
93 "netargs=setenv bootargs console=${console} " \
95 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
96 "netboot=echo Booting from net ...; " \
98 "if test ${ip_dyn} = yes; then " \
99 "setenv get_cmd dhcp; " \
101 "setenv get_cmd tftp; " \
103 "${get_cmd} ${loadaddr} ${image}; " \
104 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
105 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
106 "booti ${loadaddr} - ${fdt_addr}; " \
108 "echo WARN: Cannot load the DT; " \
114 #define CONFIG_BOOTCOMMAND \
115 "mmc dev ${mmcdev}; if mmc rescan; then " \
116 "if run loadbootscript; then " \
119 "if run loadimage; then " \
121 "else run netboot; " \
124 "else booti ${loadaddr} - ${fdt_addr}; fi"
126 /* Link Definitions */
127 #define CONFIG_LOADADDR 0x80280000
129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
131 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000
133 /* Default environment is in SD */
134 #define CONFIG_ENV_SIZE 0x1000
135 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
136 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
138 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
140 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
141 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
142 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
143 #define CONFIG_SYS_FSL_USDHC_NUM 2
145 /* Size of malloc() pool */
146 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
148 #define CONFIG_SYS_SDRAM_BASE 0x80000000
149 #define PHYS_SDRAM_1 0x80000000
150 #define PHYS_SDRAM_2 0x880000000
151 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
152 #define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
155 #define CONFIG_BAUDRATE 115200
157 /* Generic Timer Definitions */
158 #define COUNTER_FREQUENCY 8000000 /* 8MHz */
161 #define CONFIG_FEC_XCV_TYPE RGMII
162 #define FEC_QUIRK_ENET_MAC
164 #endif /* __IMX8QM_MEK_H */