1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M)
15 #ifdef CONFIG_SPL_BUILD
16 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
17 #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
21 #define CONFIG_SPL_STACK 0x013E000
22 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
23 #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
24 #define CONFIG_SYS_SPL_MALLOC_START 0x00120000
25 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
26 #define CONFIG_SERIAL_LPUART_BASE 0x5a060000
27 #define CONFIG_MALLOC_F_ADDR 0x00120000
29 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
31 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
34 #define CONFIG_REMAKE_ELF
36 /* Flat Device Tree Definitions */
37 #define CONFIG_OF_BOARD_SETUP
39 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
40 #define USDHC1_BASE_ADDR 0x5B010000
41 #define USDHC2_BASE_ADDR 0x5B020000
43 #ifdef CONFIG_AHAB_BOOT
44 #define AHAB_ENV "sec_boot=yes\0"
46 #define AHAB_ENV "sec_boot=no\0"
49 /* Initial environment variables */
50 #define CONFIG_EXTRA_ENV_SETTINGS \
55 "console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \
56 "fdt_addr=0x83000000\0" \
57 "fdt_high=0xffffffffffffffff\0" \
59 "fdt_file=undefined\0" \
60 "initrd_addr=0x83800000\0" \
61 "initrd_high=0xffffffffffffffff\0" \
62 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
63 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
64 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
65 "mmcautodetect=yes\0" \
66 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
67 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
68 "bootscript=echo Running bootscript from mmc ...; " \
70 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
71 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
72 "boot_os=booti ${loadaddr} - ${fdt_addr};\0" \
73 "loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}\0" \
74 "auth_os=auth_cntr ${cntr_addr}\0" \
75 "mmcboot=echo Booting from mmc ...; " \
77 "if test ${sec_boot} = yes; then " \
78 "if run auth_os; then " \
81 "echo ERR: failed to authenticate; " \
84 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
85 "if run loadfdt; then " \
88 "echo WARN: Cannot load the DT; " \
91 "echo wait for boot; " \
94 "netargs=setenv bootargs console=${console} " \
96 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
97 "netboot=echo Booting from net ...; " \
99 "if test ${ip_dyn} = yes; then " \
100 "setenv get_cmd dhcp; " \
102 "setenv get_cmd tftp; " \
104 "if test ${sec_boot} = yes; then " \
105 "${get_cmd} ${cntr_addr} ${cntr_file}; " \
106 "if run auth_os; then " \
109 "echo ERR: failed to authenticate; " \
112 "${get_cmd} ${loadaddr} ${image}; " \
113 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
114 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
115 "booti ${loadaddr} - ${fdt_addr}; " \
117 "echo WARN: Cannot load the DT; " \
124 #define CONFIG_BOOTCOMMAND \
125 "mmc dev ${mmcdev}; if mmc rescan; then " \
126 "if run loadbootscript; then " \
129 "if test ${sec_boot} = yes; then " \
130 "if run loadcntr; then " \
132 "else run netboot; " \
135 "if run loadimage; then " \
137 "else run netboot; " \
141 "else booti ${loadaddr} - ${fdt_addr}; fi"
143 /* Link Definitions */
145 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000
147 /* Default environment is in SD */
149 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
151 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
152 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
153 #define CONFIG_SYS_FSL_USDHC_NUM 2
155 #define CONFIG_SYS_SDRAM_BASE 0x80000000
156 #define PHYS_SDRAM_1 0x80000000
157 #define PHYS_SDRAM_2 0x880000000
158 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
159 #define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
161 /* Generic Timer Definitions */
162 #define COUNTER_FREQUENCY 8000000 /* 8MHz */
165 #define CONFIG_FEC_XCV_TYPE RGMII
167 #endif /* __IMX8QM_MEK_H */