1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2017-2019 NXP
4 * Copyright 2019-2023 Kococonnector GmbH
7 #ifndef __IMX8QM_DMSSE20_H
8 #define __IMX8QM_DMSSE20_H
10 #include <linux/sizes.h>
11 #include <asm/arch/imx-regs.h>
13 /* Flat Device Tree Definitions */
15 #define CFG_SYS_FSL_ESDHC_ADDR 0
16 #define USDHC1_BASE_ADDR 0x5B010000
17 #define USDHC2_BASE_ADDR 0x5B020000
18 #define USDHC3_BASE_ADDR 0x5B030000
20 #define FEC_QUIRK_ENET_MAC
22 #define IMX_FEC_BASE 0x5B040000
24 #define IMX_FEC1_BASE 0x5B040000
26 #define IMX_FEC2_BASE 0x5B050000
28 #ifdef CONFIG_NAND_BOOT
29 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
31 #define MFG_NAND_PARTITION ""
34 /* Incorporate settings into the U-Boot environment */
35 #define CFG_EXTRA_ENV_SETTINGS
37 #define CFG_SYS_FSL_USDHC_NUM 2
39 #define CFG_SYS_SDRAM_BASE 0x080000000
40 #define PHYS_SDRAM_1 0x080000000
41 #define PHYS_SDRAM_2 0x880000000
42 #define PHYS_SDRAM_1_SIZE 0x080000000 /* 2 GB */
43 #define PHYS_SDRAM_2_SIZE 0x180000000 /* 6 GB */
45 /* Generic Timer Definitions */
46 #define COUNTER_FREQUENCY 8000000 /* 8MHz */
48 #endif /* __IMX8QM_DMSSE20_H */