1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __IMX8M_PHANBELL_H
7 #define __IMX8M_PHANBELL_H
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #define CONFIG_SPL_MAX_SIZE (172 * 1024)
13 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
16 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
18 #ifdef CONFIG_SPL_BUILD
19 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
20 #define CONFIG_SPL_WATCHDOG_SUPPORT
21 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
22 #define CONFIG_SPL_POWER_SUPPORT
23 #define CONFIG_SPL_I2C_SUPPORT
24 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
25 #define CONFIG_SPL_STACK 0x187FF0
26 #define CONFIG_SPL_LIBCOMMON_SUPPORT
27 #define CONFIG_SPL_LIBGENERIC_SUPPORT
28 #define CONFIG_SPL_GPIO_SUPPORT
29 #define CONFIG_SPL_MMC_SUPPORT
30 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
31 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
32 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
33 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
34 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
36 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
37 #define CONFIG_MALLOC_F_ADDR 0x182000
38 /* For RAW image gives a error info not panic */
39 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
43 #undef CONFIG_DM_PMIC_PFUZE100
45 #define CONFIG_SYS_I2C
46 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
50 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
53 #define CONFIG_POWER_I2C
56 #define CONFIG_REMAKE_ELF
60 #if defined(CONFIG_CMD_NET)
62 #define CONFIG_ETHPRIME "FEC"
64 #define CONFIG_FEC_MXC
65 #define CONFIG_FEC_XCV_TYPE RGMII
66 #define CONFIG_FEC_MXC_PHYADDR 0
67 #define FEC_QUIRK_ENET_MAC
69 #define CONFIG_PHY_GIGE
70 #define IMX_FEC_BASE 0x30BE0000
75 #define CONFIG_MFG_ENV_SETTINGS \
76 "initrd_addr=0x43800000\0" \
77 "initrd_high=0xffffffff\0" \
79 /* Initial environment variables */
80 #define CONFIG_EXTRA_ENV_SETTINGS \
81 CONFIG_MFG_ENV_SETTINGS \
84 "console=ttymxc0,115200\0" \
85 "fdt_addr=0x43000000\0" \
86 "fdt_high=0xffffffffffffffff\0" \
88 "fdt_file=imx8mq-phanbell.dtb\0" \
89 "initrd_addr=0x43800000\0" \
90 "initrd_high=0xffffffffffffffff\0" \
91 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
92 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
93 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
94 "mmcautodetect=yes\0" \
95 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
96 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
97 "bootscript=echo Running bootscript from mmc ...; " \
99 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
100 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
101 "mmcboot=echo Booting from mmc ...; " \
103 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
104 "if run loadfdt; then " \
105 "booti ${loadaddr} - ${fdt_addr}; " \
107 "echo WARN: Cannot load the DT; " \
110 "echo wait for boot; " \
112 "netargs=setenv bootargs console=${console} " \
114 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
115 "netboot=echo Booting from net ...; " \
117 "if test ${ip_dyn} = yes; then " \
118 "setenv get_cmd dhcp; " \
120 "setenv get_cmd tftp; " \
122 "${get_cmd} ${loadaddr} ${image}; " \
123 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
124 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
125 "booti ${loadaddr} - ${fdt_addr}; " \
127 "echo WARN: Cannot load the DT; " \
133 #define CONFIG_BOOTCOMMAND \
134 "mmc dev ${mmcdev}; if mmc rescan; then " \
135 "if run loadbootscript; then " \
138 "if run loadimage; then " \
140 "else run netboot; " \
143 "else booti ${loadaddr} - ${fdt_addr}; fi"
145 /* Link Definitions */
146 #define CONFIG_LOADADDR 0x40480000
148 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
150 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
151 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
152 #define CONFIG_SYS_INIT_SP_OFFSET \
153 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
154 #define CONFIG_SYS_INIT_SP_ADDR \
155 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
157 #define CONFIG_ENV_OVERWRITE
158 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
159 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
161 /* Size of malloc() pool */
162 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
164 #define CONFIG_SYS_SDRAM_BASE 0x40000000
165 #define PHYS_SDRAM 0x40000000
166 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
168 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
169 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
170 (PHYS_SDRAM_SIZE >> 1))
172 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
174 /* Monitor Command Prompt */
175 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
176 #define CONFIG_SYS_CBSIZE 1024
177 #define CONFIG_SYS_MAXARGS 64
178 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
179 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
180 sizeof(CONFIG_SYS_PROMPT) + 16)
182 #define CONFIG_IMX_BOOTAUX
184 #define CONFIG_SYS_FSL_USDHC_NUM 2
185 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
187 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
189 #define CONFIG_MXC_GPIO
192 #define CONFIG_SYS_I2C_SPEED 100000
194 #define CONFIG_OF_SYSTEM_SETUP
196 #ifndef CONFIG_SPL_BUILD
197 #define CONFIG_DM_PMIC