Convert CONFIG_SPL_PAD_TO et al to Kconfig
[platform/kernel/u-boot.git] / include / configs / imx8mq_phanbell.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2020 NXP
4  */
5
6 #ifndef __IMX8M_PHANBELL_H
7 #define __IMX8M_PHANBELL_H
8
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
11
12 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
13
14 #ifdef CONFIG_SPL_BUILD
15 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
16 #define CONFIG_SPL_STACK                0x187FF0
17 #define CONFIG_SPL_BSS_START_ADDR      0x00180000
18 #define CONFIG_SPL_BSS_MAX_SIZE        0x2000   /* 8 KB */
19 #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
20 #define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000   /* 512 KB */
21 #define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
22
23 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
24 #define CONFIG_MALLOC_F_ADDR            0x182000
25 /* For RAW image gives a error info not panic */
26 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
27 #endif
28
29 /* ENET Config */
30 /* ENET1 */
31 #if defined(CONFIG_CMD_NET)
32 #define CONFIG_FEC_MXC_PHYADDR          0
33 #endif
34
35 #define CONFIG_MFG_ENV_SETTINGS \
36         "initrd_addr=0x43800000\0" \
37         "initrd_high=0xffffffff\0" \
38
39 /* Initial environment variables */
40 #define CONFIG_EXTRA_ENV_SETTINGS               \
41         CONFIG_MFG_ENV_SETTINGS \
42         "script=boot.scr\0" \
43         "image=Image\0" \
44         "console=ttymxc0,115200\0" \
45         "fdt_addr=0x43000000\0"                 \
46         "fdt_high=0xffffffffffffffff\0"         \
47         "boot_fdt=try\0" \
48         "fdt_file=imx8mq-phanbell.dtb\0" \
49         "initrd_addr=0x43800000\0"              \
50         "initrd_high=0xffffffffffffffff\0" \
51         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
52         "mmcpart=1\0" \
53         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
54         "mmcautodetect=yes\0" \
55         "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
56         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
57         "bootscript=echo Running bootscript from mmc ...; " \
58                 "source\0" \
59         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
60         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
61         "mmcboot=echo Booting from mmc ...; " \
62                 "run mmcargs; " \
63                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
64                         "if run loadfdt; then " \
65                                 "booti ${loadaddr} - ${fdt_addr}; " \
66                         "else " \
67                                 "echo WARN: Cannot load the DT; " \
68                         "fi; " \
69                 "else " \
70                         "echo wait for boot; " \
71                 "fi;\0" \
72         "netargs=setenv bootargs console=${console} " \
73                 "root=/dev/nfs " \
74                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
75         "netboot=echo Booting from net ...; " \
76                 "run netargs;  " \
77                 "if test ${ip_dyn} = yes; then " \
78                         "setenv get_cmd dhcp; " \
79                 "else " \
80                         "setenv get_cmd tftp; " \
81                 "fi; " \
82                 "${get_cmd} ${loadaddr} ${image}; " \
83                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
84                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
85                                 "booti ${loadaddr} - ${fdt_addr}; " \
86                         "else " \
87                                 "echo WARN: Cannot load the DT; " \
88                         "fi; " \
89                 "else " \
90                         "booti; " \
91                 "fi;\0"
92
93 /* Link Definitions */
94
95 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
96 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
97 #define CONFIG_SYS_INIT_SP_OFFSET \
98         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
99 #define CONFIG_SYS_INIT_SP_ADDR \
100         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
101
102
103 #define CONFIG_SYS_SDRAM_BASE           0x40000000
104 #define PHYS_SDRAM                      0x40000000
105 #define PHYS_SDRAM_SIZE                 0x40000000 /* 1GB DDR */
106
107 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(1)
108
109 #define CONFIG_SYS_FSL_USDHC_NUM        2
110 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
111
112 #endif