include/configs/imx8mq_phanbell.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2020 NXP
   4  */
   5
   6 #ifndef __IMX8M_PHANBELL_H
   7 #define __IMX8M_PHANBELL_H
   8
   9 #include <linux/sizes.h>
  10 #include <asm/arch/imx-regs.h>
  11
  12 #define CONFIG_SPL_MAX_SIZE             (172 * 1024)
  13 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  16
  17 #ifdef CONFIG_SPL_BUILD
  18 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  19 #define CONFIG_SPL_WATCHDOG
  20 #define CONFIG_SPL_DRIVERS_MISC
  21 #define CONFIG_SPL_POWER
  22 #define CONFIG_SPL_I2C
  23 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
  24 #define CONFIG_SPL_STACK                0x187FF0
  25 #define CONFIG_SPL_LIBCOMMON_SUPPORT
  26 #define CONFIG_SPL_LIBGENERIC_SUPPORT
  27 #define CONFIG_SPL_GPIO
  28 #define CONFIG_SPL_MMC_SUPPORT
  29 #define CONFIG_SPL_BSS_START_ADDR      0x00180000
  30 #define CONFIG_SPL_BSS_MAX_SIZE        0x2000   /* 8 KB */
  31 #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
  32 #define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000   /* 512 KB */
  33 #define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
  34
  35 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  36 #define CONFIG_MALLOC_F_ADDR            0x182000
  37 /* For RAW image gives a error info not panic */
  38 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  39
  40 #undef CONFIG_DM_MMC
  41 #undef CONFIG_DM_PMIC
  42 #undef CONFIG_DM_PMIC_PFUZE100
  43
  44 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  45
  46 #define CONFIG_POWER
  47 #define CONFIG_POWER_I2C
  48 #endif
  49
  50 #define CONFIG_REMAKE_ELF
  51
  52 /* ENET Config */
  53 /* ENET1 */
  54 #if defined(CONFIG_CMD_NET)
  55 #define CONFIG_MII
  56 #define CONFIG_ETHPRIME                 "FEC"
  57
  58 #define CONFIG_FEC_MXC
  59 #define CONFIG_FEC_XCV_TYPE             RGMII
  60 #define CONFIG_FEC_MXC_PHYADDR          0
  61 #define FEC_QUIRK_ENET_MAC
  62
  63 #define CONFIG_PHY_GIGE
  64 #define IMX_FEC_BASE                    0x30BE0000
  65
  66 #define CONFIG_PHYLIB
  67 #endif
  68
  69 #define CONFIG_MFG_ENV_SETTINGS \
  70         "initrd_addr=0x43800000\0" \
  71         "initrd_high=0xffffffff\0" \
  72
  73 /* Initial environment variables */
  74 #define CONFIG_EXTRA_ENV_SETTINGS               \
  75         CONFIG_MFG_ENV_SETTINGS \
  76         "script=boot.scr\0" \
  77         "image=Image\0" \
  78         "console=ttymxc0,115200\0" \
  79         "fdt_addr=0x43000000\0"                 \
  80         "fdt_high=0xffffffffffffffff\0"         \
  81         "boot_fdt=try\0" \
  82         "fdt_file=imx8mq-phanbell.dtb\0" \
  83         "initrd_addr=0x43800000\0"              \
  84         "initrd_high=0xffffffffffffffff\0" \
  85         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  86         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  87         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  88         "mmcautodetect=yes\0" \
  89         "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  90         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  91         "bootscript=echo Running bootscript from mmc ...; " \
  92                 "source\0" \
  93         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  94         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  95         "mmcboot=echo Booting from mmc ...; " \
  96                 "run mmcargs; " \
  97                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  98                         "if run loadfdt; then " \
  99                                 "booti ${loadaddr} - ${fdt_addr}; " \
 100                         "else " \
 101                                 "echo WARN: Cannot load the DT; " \
 102                         "fi; " \
 103                 "else " \
 104                         "echo wait for boot; " \
 105                 "fi;\0" \
 106         "netargs=setenv bootargs console=${console} " \
 107                 "root=/dev/nfs " \
 108                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 109         "netboot=echo Booting from net ...; " \
 110                 "run netargs;  " \
 111                 "if test ${ip_dyn} = yes; then " \
 112                         "setenv get_cmd dhcp; " \
 113                 "else " \
 114                         "setenv get_cmd tftp; " \
 115                 "fi; " \
 116                 "${get_cmd} ${loadaddr} ${image}; " \
 117                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 118                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 119                                 "booti ${loadaddr} - ${fdt_addr}; " \
 120                         "else " \
 121                                 "echo WARN: Cannot load the DT; " \
 122                         "fi; " \
 123                 "else " \
 124                         "booti; " \
 125                 "fi;\0"
 126
 127 #define CONFIG_BOOTCOMMAND \
 128            "mmc dev ${mmcdev}; if mmc rescan; then " \
 129                    "if run loadbootscript; then " \
 130                            "run bootscript; " \
 131                    "else " \
 132                            "if run loadimage; then " \
 133                                    "run mmcboot; " \
 134                            "else run netboot; " \
 135                            "fi; " \
 136                    "fi; " \
 137            "else booti ${loadaddr} - ${fdt_addr}; fi"
 138
 139 /* Link Definitions */
 140
 141 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 142 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 143 #define CONFIG_SYS_INIT_SP_OFFSET \
 144         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 145 #define CONFIG_SYS_INIT_SP_ADDR \
 146         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 147
 148 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 149
 150 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 151 #define PHYS_SDRAM                      0x40000000
 152 #define PHYS_SDRAM_SIZE                 0x40000000 /* 1GB DDR */
 153
 154 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
 155 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
 156                                         (PHYS_SDRAM_SIZE >> 1))
 157
 158 #define CONFIG_MXC_UART_BASE            UART1_BASE_ADDR
 159
 160 /* Monitor Command Prompt */
 161 #define CONFIG_SYS_CBSIZE               1024
 162 #define CONFIG_SYS_MAXARGS              64
 163 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 164 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 165                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 166
 167 #define CONFIG_IMX_BOOTAUX
 168
 169 #define CONFIG_SYS_FSL_USDHC_NUM        2
 170 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 171
 172 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 173
 174 #define CONFIG_MXC_GPIO
 175
 176 #define CONFIG_OF_SYSTEM_SETUP
 177
 178 #ifndef CONFIG_SPL_BUILD
 179 #define CONFIG_DM_PMIC
 180 #endif
 181
 182 #endif