1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __IMX8M_PHANBELL_H
7 #define __IMX8M_PHANBELL_H
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #define CONFIG_SPL_MAX_SIZE (172 * 1024)
13 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
17 #ifdef CONFIG_SPL_BUILD
18 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
19 #define CONFIG_SPL_WATCHDOG
20 #define CONFIG_SPL_DRIVERS_MISC
21 #define CONFIG_SPL_POWER
22 #define CONFIG_SPL_I2C
23 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
24 #define CONFIG_SPL_STACK 0x187FF0
25 #define CONFIG_SPL_LIBCOMMON_SUPPORT
26 #define CONFIG_SPL_LIBGENERIC_SUPPORT
27 #define CONFIG_SPL_GPIO
28 #define CONFIG_SPL_MMC
29 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
30 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
31 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
32 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
33 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
35 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
36 #define CONFIG_MALLOC_F_ADDR 0x182000
37 /* For RAW image gives a error info not panic */
38 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
42 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
44 #define CONFIG_POWER_LEGACY
45 #define CONFIG_POWER_I2C
48 #define CONFIG_REMAKE_ELF
52 #if defined(CONFIG_CMD_NET)
54 #define CONFIG_ETHPRIME "FEC"
56 #define CONFIG_FEC_MXC
57 #define CONFIG_FEC_XCV_TYPE RGMII
58 #define CONFIG_FEC_MXC_PHYADDR 0
59 #define FEC_QUIRK_ENET_MAC
61 #define CONFIG_PHY_GIGE
62 #define IMX_FEC_BASE 0x30BE0000
67 #define CONFIG_MFG_ENV_SETTINGS \
68 "initrd_addr=0x43800000\0" \
69 "initrd_high=0xffffffff\0" \
71 /* Initial environment variables */
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73 CONFIG_MFG_ENV_SETTINGS \
76 "console=ttymxc0,115200\0" \
77 "fdt_addr=0x43000000\0" \
78 "fdt_high=0xffffffffffffffff\0" \
80 "fdt_file=imx8mq-phanbell.dtb\0" \
81 "initrd_addr=0x43800000\0" \
82 "initrd_high=0xffffffffffffffff\0" \
83 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
84 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
85 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
86 "mmcautodetect=yes\0" \
87 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
88 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
89 "bootscript=echo Running bootscript from mmc ...; " \
91 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
92 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
93 "mmcboot=echo Booting from mmc ...; " \
95 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
96 "if run loadfdt; then " \
97 "booti ${loadaddr} - ${fdt_addr}; " \
99 "echo WARN: Cannot load the DT; " \
102 "echo wait for boot; " \
104 "netargs=setenv bootargs console=${console} " \
106 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
107 "netboot=echo Booting from net ...; " \
109 "if test ${ip_dyn} = yes; then " \
110 "setenv get_cmd dhcp; " \
112 "setenv get_cmd tftp; " \
114 "${get_cmd} ${loadaddr} ${image}; " \
115 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
116 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
117 "booti ${loadaddr} - ${fdt_addr}; " \
119 "echo WARN: Cannot load the DT; " \
125 #define CONFIG_BOOTCOMMAND \
126 "mmc dev ${mmcdev}; if mmc rescan; then " \
127 "if run loadbootscript; then " \
130 "if run loadimage; then " \
132 "else run netboot; " \
135 "else booti ${loadaddr} - ${fdt_addr}; fi"
137 /* Link Definitions */
139 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
140 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
141 #define CONFIG_SYS_INIT_SP_OFFSET \
142 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
143 #define CONFIG_SYS_INIT_SP_ADDR \
144 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
146 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
148 #define CONFIG_SYS_SDRAM_BASE 0x40000000
149 #define PHYS_SDRAM 0x40000000
150 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
152 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
153 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
154 (PHYS_SDRAM_SIZE >> 1))
156 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
158 /* Monitor Command Prompt */
159 #define CONFIG_SYS_CBSIZE 1024
160 #define CONFIG_SYS_MAXARGS 64
161 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
162 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
163 sizeof(CONFIG_SYS_PROMPT) + 16)
165 #define CONFIG_IMX_BOOTAUX
167 #define CONFIG_SYS_FSL_USDHC_NUM 2
168 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
170 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
172 #define CONFIG_MXC_GPIO
174 #define CONFIG_OF_SYSTEM_SETUP