1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M)
15 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
20 #ifdef CONFIG_SPL_BUILD
21 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
22 #define CONFIG_SPL_STACK 0x187FF0
23 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
24 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
25 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
26 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
27 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
29 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
30 #define CONFIG_MALLOC_F_ADDR 0x182000
31 /* For RAW image gives a error info not panic */
32 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
36 #define CONFIG_POWER_PFUZE100
37 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
40 #define CONFIG_REMAKE_ELF
44 #if defined(CONFIG_CMD_NET)
46 #define CONFIG_ETHPRIME "FEC"
48 #define CONFIG_FEC_XCV_TYPE RGMII
49 #define CONFIG_FEC_MXC_PHYADDR 0
50 #define FEC_QUIRK_ENET_MAC
52 #define CONFIG_PHY_GIGE
53 #define IMX_FEC_BASE 0x30BE0000
56 #ifndef CONFIG_SPL_BUILD
57 #define BOOT_TARGET_DEVICES(func) \
62 #include <config_distro_bootcmd.h>
65 /* Initial environment variables */
66 #define CONFIG_EXTRA_ENV_SETTINGS \
68 "scriptaddr=0x43500000\0" \
69 "kernel_addr_r=0x40880000\0" \
71 "console=ttymxc0,115200\0" \
72 "fdt_addr=0x43000000\0" \
74 "fdt_file=imx8mq-evk.dtb\0" \
75 "initrd_addr=0x43800000\0" \
76 "bootm_size=0x10000000\0" \
77 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
78 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
80 /* Link Definitions */
82 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
83 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
84 #define CONFIG_SYS_INIT_SP_OFFSET \
85 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
86 #define CONFIG_SYS_INIT_SP_ADDR \
87 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
89 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
91 #define CONFIG_SYS_SDRAM_BASE 0x40000000
92 #define PHYS_SDRAM 0x40000000
93 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
95 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
97 /* Monitor Command Prompt */
98 #undef CONFIG_SYS_PROMPT
99 #define CONFIG_SYS_PROMPT "u-boot=> "
100 #define CONFIG_SYS_CBSIZE 1024
101 #define CONFIG_SYS_MAXARGS 64
102 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
103 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
104 sizeof(CONFIG_SYS_PROMPT) + 16)
106 #define CONFIG_IMX_BOOTAUX
108 #define CONFIG_SYS_FSL_USDHC_NUM 2
109 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
111 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
113 #define CONFIG_MXC_GPIO
115 #define CONFIG_OF_SYSTEM_SETUP