1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
14 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
16 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
17 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
19 #ifdef CONFIG_SPL_BUILD
20 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
21 #define CONFIG_SPL_WATCHDOG_SUPPORT
22 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
23 #define CONFIG_SPL_POWER_SUPPORT
24 #define CONFIG_SPL_I2C_SUPPORT
25 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
26 #define CONFIG_SPL_STACK 0x187FF0
27 #define CONFIG_SPL_LIBCOMMON_SUPPORT
28 #define CONFIG_SPL_LIBGENERIC_SUPPORT
29 #define CONFIG_SPL_GPIO_SUPPORT
30 #define CONFIG_SPL_MMC_SUPPORT
31 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
32 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
33 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
34 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
35 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
37 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
38 #define CONFIG_MALLOC_F_ADDR 0x182000
39 /* For RAW image gives a error info not panic */
40 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
44 #undef CONFIG_DM_PMIC_PFUZE100
46 #define CONFIG_SYS_I2C
47 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
48 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
51 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
54 #define CONFIG_POWER_I2C
55 #define CONFIG_POWER_PFUZE100
56 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
59 #define CONFIG_REMAKE_ELF
61 #define CONFIG_BOARD_EARLY_INIT_F
62 #define CONFIG_BOARD_LATE_INIT
64 #undef CONFIG_CMD_EXPORTENV
65 #undef CONFIG_CMD_IMPORTENV
66 #undef CONFIG_CMD_IMLS
68 #undef CONFIG_CMD_CRC32
72 #if defined(CONFIG_CMD_NET)
73 #define CONFIG_CMD_PING
74 #define CONFIG_CMD_DHCP
75 #define CONFIG_CMD_MII
77 #define CONFIG_ETHPRIME "FEC"
79 #define CONFIG_FEC_MXC
80 #define CONFIG_FEC_XCV_TYPE RGMII
81 #define CONFIG_FEC_MXC_PHYADDR 0
82 #define FEC_QUIRK_ENET_MAC
84 #define CONFIG_PHY_GIGE
85 #define IMX_FEC_BASE 0x30BE0000
88 #define CONFIG_MFG_ENV_SETTINGS \
89 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
91 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
92 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
93 "g_mass_storage.iSerialNumber=\"\" "\
96 "initrd_addr=0x43800000\0" \
97 "initrd_high=0xffffffff\0" \
98 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
99 /* Initial environment variables */
100 #define CONFIG_EXTRA_ENV_SETTINGS \
101 CONFIG_MFG_ENV_SETTINGS \
102 "script=boot.scr\0" \
104 "console=ttymxc0,115200\0" \
105 "fdt_addr=0x43000000\0" \
106 "fdt_high=0xffffffffffffffff\0" \
108 "fdt_file=imx8mq-evk.dtb\0" \
109 "initrd_addr=0x43800000\0" \
110 "initrd_high=0xffffffffffffffff\0" \
111 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
112 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
113 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
114 "mmcautodetect=yes\0" \
115 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
116 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
117 "bootscript=echo Running bootscript from mmc ...; " \
119 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
120 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
121 "mmcboot=echo Booting from mmc ...; " \
123 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
124 "if run loadfdt; then " \
125 "booti ${loadaddr} - ${fdt_addr}; " \
127 "echo WARN: Cannot load the DT; " \
130 "echo wait for boot; " \
132 "netargs=setenv bootargs console=${console} " \
134 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
135 "netboot=echo Booting from net ...; " \
137 "if test ${ip_dyn} = yes; then " \
138 "setenv get_cmd dhcp; " \
140 "setenv get_cmd tftp; " \
142 "${get_cmd} ${loadaddr} ${image}; " \
143 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
144 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
145 "booti ${loadaddr} - ${fdt_addr}; " \
147 "echo WARN: Cannot load the DT; " \
153 #define CONFIG_BOOTCOMMAND \
154 "mmc dev ${mmcdev}; if mmc rescan; then " \
155 "if run loadbootscript; then " \
158 "if run loadimage; then " \
160 "else run netboot; " \
163 "else booti ${loadaddr} - ${fdt_addr}; fi"
165 /* Link Definitions */
166 #define CONFIG_LOADADDR 0x40480000
168 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
170 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
171 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
172 #define CONFIG_SYS_INIT_SP_OFFSET \
173 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
174 #define CONFIG_SYS_INIT_SP_ADDR \
175 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
177 #define CONFIG_ENV_OVERWRITE
178 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
179 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
181 /* Size of malloc() pool */
182 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
184 #define CONFIG_SYS_SDRAM_BASE 0x40000000
185 #define PHYS_SDRAM 0x40000000
186 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
188 #define CONFIG_BAUDRATE 115200
190 #define CONFIG_MXC_UART
191 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
193 /* Monitor Command Prompt */
194 #undef CONFIG_SYS_PROMPT
195 #define CONFIG_SYS_PROMPT "u-boot=> "
196 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
197 #define CONFIG_SYS_CBSIZE 1024
198 #define CONFIG_SYS_MAXARGS 64
199 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
200 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
201 sizeof(CONFIG_SYS_PROMPT) + 16)
203 #define CONFIG_IMX_BOOTAUX
205 #define CONFIG_SYS_FSL_USDHC_NUM 2
206 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
208 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
210 #define CONFIG_MXC_GPIO
212 #define CONFIG_CMD_FUSE
215 #define CONFIG_SYS_I2C_SPEED 100000
217 #define CONFIG_OF_SYSTEM_SETUP
219 #ifndef CONFIG_SPL_BUILD
220 #define CONFIG_DM_PMIC